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PDF ISL84684 Data sheet ( Hoja de datos )
| Número de pieza | ISL84684 | |
| Descripción | Dual SPDT Analog Switch | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
Ultra Low ON-Resistance, Low Voltage,
Single Supply, Dual SPDT Analog Switch
The Intersil ISL84684 device is a low ON-resistance, low
voltage, bidirectional, dual single-pole/double-throw (SPDT)
analog switch designed to operate from a single +1.65V to
+3.6V supply. Targeted applications include battery powered
equipment that benefit from low RON (0.25Ω) and fast
switching speeds (tON = 14ns, tOFF = 6ns). The digital logic
input is 1.8V logic-compatible when using a single +3V supply.
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This part may be used to “mux-in”
additional functionality while reducing ASIC design risk. The
ISL84684 is offered in small form factor packages, alleviating
board space limitations.
The ISL84684 is a committed dual single-pole/double-throw
(SPDT) that consist of two normally open (NO) and two
normally (NC) switches. This configuration can be used as a
dual 2-to-1 multiplexer. The ISL84684 is pin compatible with
the MAX4684 and MAX4685.
www.DataSheet4U.com
TABLE 1. FEATURES AT A GLANCE
ISL84684
Number of Switches
2
SW SPDT or 2-1 MUX
3V RON
3V tON/tOFF
1.8V RON
1.8V tON/tOFF
Packages
0.25Ω
12ns/5ns
0.4Ω
20ns/8ns
10 Ld 3x3 Thin DFN, 10 Ld MSOP
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
ISL84684
June 2004
FN6088
Features
• Pb-Free Available as an Option (see Ordering Info)
• Drop in Replacement for the MAX4684 and MAX4685
• ON Resistance (RON)
- V+ = +2.7V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.29Ω
- V+ = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4Ω
• RON Matching Between Channels . . . . . . . . . . . . . . . 0.03Ω
• RON Flatness Across Signal Range . . . . . . . . . . . . . . 0.03Ω
• Single Supply Operation . . . . . . . . . . . . . . . +1.65V to +3.6V
• Fast Switching Action (V+ = +2.7V)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6ns
• ESD HBM Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>9kV
• Guaranteed Break-before-Make
• 1.8V Logic Compatible (+3V supply)
• Available in 10 lead 3x3 Thin DFN and 10 lead MSOP
Applications
• Battery powered, Handheld, and Portable Equipment
- Cellular/mobile Phones
- Pagers
- Laptops, Notebooks, Palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio and Video Switching
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL84684
Test Circuits and Waveforms
VINH
LOGIC
INPUT
VINL
50%
tOFF
tr < 20ns
tf < 20ns
SWITCH
INPUT
VNO
SWITCH
OUTPUT 0V
VOUT
90%
tON
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
V+
C
SWITCH
INPUT
LOGIC
INPUT
NO or NC
IN
GND
COM
VOUT
RL CL
50Ω 35pF
Repeat test for all switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) -R----L-----+--R--R---L--(--O-----N----)
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
V+
C
SWITCH
OUTPUT
VOUT
LOGIC
INPUT
ON
∆VOUT
OFF
VINH
ON
VINL
RG NO or NC
COM
VG
GND
IN
LOGIC
INPUT
Q = ∆VOUT x CL
FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
VOUT
CL
V+
C
LOGIC
INPUT
VINH
VINL
VNX
NO
NC
IN
COM
VOUT
RL CL
50Ω 35pF
SWITCH
OUTPUT
VOUT
0V
90%
tD
FIGURE 3A. MEASUREMENT POINTS
LOGIC
INPUT
GND
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
5
5 Page 
ISL84684
Mini Small Outline Plastic Packages (MSOP)
N
E1 E
INDEX
AREA
A A2
12
TOP VIEW
-B-
0.20 (0.008) A B C
GAUGE
PLANE
0.25
(0.010)
4X θ
R1
R
SEATING
PLANE -C-
L
4X θ
L1
A1 -H-
b
e
D
SEATING
0.10 (0.004) C PLANE
-A-
0.20 (0.008) C
C
SIDE VIEW
a
0.20 (0.008) C D
CL
E1 -B-
END VIEW
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. - H - Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums -A - and - B - to be determined at Datum plane
-H- .
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
M10.118 (JEDEC MO-187BA)
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.037 0.043 0.94
1.10
-
A1
0.002 0.006 0.05
0.15
-
A2
0.030 0.037 0.75
0.95
-
b
0.007 0.011 0.18
0.27
9
c
0.004 0.008 0.09
0.20
-
D
0.116 0.120 2.95
3.05
3
E1
0.116 0.120 2.95
3.05
4
e 0.020 BSC
0.50 BSC
-
E
0.187 0.199 4.75
5.05
-
L
0.016 0.028 0.40
0.70
6
L1 0.037 REF
0.95 REF
-
N 10
10 7
R
0.003
-
0.07
-
-
R1
0.003
-
0.07
-
θ 5o 15o 5o 15o
α 0o 6o 0o 6o
-
-
-
Rev. 0 12/02
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ISL84684.PDF ] | |
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