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PDF ISL51002 Data sheet ( Hoja de datos )
| Número de pieza | ISL51002 | |
| Descripción | 10-Bit Video Analog Front End | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
December 22, 2006
ISL51002
FN6164.0
10-Bit Video Analog Front End (AFE) with
Measurement and Auto-Adjust Features
The ISL51002 3-channel, 10-bit Analog Front End (AFE)
contains all the functionality needed to digitize analog YPbPr
video from HDTV tuners, settop boxes, SD and HD DVDs,
as well as RGB graphics signals from personal computers
and workstations. The fourth generation analog design
delivers 10-bit performance and a 165MSPS maximum
conversion rate supporting resolutions up to 1080p/UXGA at
60Hz. The front end's programmable input bandwidth
ensures sharp, low noise images at all resolutions.
To accelerate and simplify mode detection, the ISL51002
integrates a sophisticated set of measurement tools that fully
characterizes the video signal and timing, offloading the host
microcontroller. Automatic Black Level Compensation
(ABLC™) eliminates part-to-part offset variation, ensuring
perfect black level performance in every application.
The ISL51002's Digital PLL generates a pixel clock from the
analog source's HSYNC or SOG (Sync-On-Green) signals.
Pixel clock output frequencies range from 10MHz to 165MHz
with sampling clock jitter of 250ps peak to peak.
Applicationswww.DataSheet4U.com
• Flat Panel TVs
• Front/Rear Projection TVs
• PC LCD Monitors and Projectors
• High Quality Scan Converters
• Video/Graphics Processing
Simplified Block DIagram
Features
• Automatic sampling phase adjustment
• 10-bit triple Analog to Digital Converters with
oversampling up to 8x in video modes
• 165MSPS maximum conversion rate (ISL51002CQZ-165)
• Robust, glitchless Macrovision®-compliant sync separator
• Analog VCR “Trick Mode” support
• ABLC™ for perfect black level performance
• 4 channel input multiplexer
• Precision sync timing measurement
• RGB to YUV color space converter
• Low PLL clock jitter (250ps p-p)
• Programmable input bandwidth (10MHz to 450MHz)
• 64 interpixel sampling positions
• ±6dB gain adjustment rate
• Pb-free plus anneal available (RoHS compliant)
Related Literature
Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”.
RGB/YPbPrIN0
RGB/YPbPrIN1
RGB/YPbPrIN2
RGB/YPbPrIN3
3
3
3
3
SOGIN0, 1, 2, 3
HSYNCIN0, 1, 2, 3
VSYNCIN0, 1, 2, 3
VOLTAGE
CLAMP
OFFSET
DAC
ABLC™
PGA
+
10-BIT ADC
SYNC
PROCESSING
DIGITAL PLL
COLOR SPACE 10
CONVERTER x3
RGB/YUVOUT
2 H/VSYNCOUT
FIELDOUT
DEOUT
HSOUT
PIXELCLKOUT
MEASUREMENT, AUTOADJUST, AFE CONFIGURATION AND CONTROL
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL51002
Electrical Specifications
Specifications apply for VA3.3 = VD3.3 = VPLLA3.3 = 3.3V, VA1.8 = VD1.8 = VPLLD1.8 = VADCD1.8 = 1.8V,
pixel rate = 110MHz for ISL51002-110, 150MHz for ISL51002-150, 165MHz for ISL51002-165, fXTAL = 25MHz,
and TA = +25°C, unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST LEVEL or NOTES
MIN TYP
MAX
UNITS
IA1.8
Analog Supply Current, 1.8V
(Note 1)
Includes 1.8V ADC reference current
draw
270 375 mA
ID3.3
Digital Supply Current, 3.3V
(Note 1)
Grayscale ramp input
30 60 mA
ID1.8
IADCD1.8
IPLLD1.8
PD
Digital Supply Current, 1.8V
(Note 1)
Total Power Dissipation
Grayscale ramp input
Grayscale ramp input
Standby Mode
65
33
1.8
0.98
50
95 mA
65 mA
10 mA
1.25 W
100 mW
AC TIMING CHARACTERISTICS
PLL Jitter (Note 2)
250 450 ps p-p
Sampling Phase Steps
5.6° per step
64
Sampling Phase Tempco
±1 ps/°C
Sampling Phase
Differential Nonlinearity
Degrees out of +360°
±3 °
Hsync Frequency Range
10 150 kHz
fXTAL
tSETUP
Crystal Frequency Range
Data Valid Before Rising Edge of 20pF DATACLK load,
Dataclk
20pF DATA load
12 25
1.8
27 MHz
ns
tHOLD
Data Valid After Rising Edge of 20pF DATACLK load,
Dataclk
20pF DATA load
3.4
ns
NOTES:
1. Supply current specified at max pixel rate (165MHz) with gray scale video applied.
2. Jitter tested at rated frequencies (165MHz, 150MHz, 110MHz) and at minimum frequency (10MHz).
5
December 22, 2006
5 Page 
ISL51002
Register Listing
ADDRESS
REGISTER
(DEFAULT VALUE)
STATUS AND INTERRUPT REGISTERS
0x00
Device ID and revision,
(read only, 0x21)
0x01
Selected Input Channel
Characteristics, (read only)
BITS
FUNCTION NAME
3:0 Device Revision
7:4 Device ID
1:0 SYNC Type
0x02
CH0 and CH1 Activity
Status, (read only)
2 HSYNC Polarity
3 VSYNC Polarity
4 Tri-level Sync
5 Interlaced
(Only for CSYNC)
6 Macrovision
7 PLL Locked
0 HSYNC0 Activity
1 VSYNC0 Activity
3:2 SOG0 Activity
0x03
CH2 and CH3 Activity
Status, (read only)
4 HSYNC1 Activity
5 VSYNC1 Activity
7:6 SOG1 Activity
0 HSYNC2 Activity
1 VSYNC2 Activity
3:2 SOG2 Activity
4 HSYNC3 Activity
5 VSYNC3 Activity
7:6 SOG3 Activity
DESCRIPTION
0x1 = second revision silicon
0x2 = ISL51002
00: Automatic Sync Selection logic could not find good sync on
H, V, or SOG (Automatic Sync mode only)
01: SYNC on HSYNC/VSYNC
10: CSYNC on HSYNC
11: CSYNC on Green Channel (SOG)
0: HSYNC Active High
1: HSYNC Active Low
0: VSYNC Active High
1: VSYNC Active Low
0: Bi-level SOG (if SOG is active)
1: Tri-level SOG
0: Non-interlaced or progressive signal
1: Interlaced signal
0: No Macrovision detected
1: Macrovision encoding detected
0: PLL unlocked
1: PLL locked to incoming HSYNC
0: HSYNC0 Inactive
1: HSYNC0 Active – There is a periodic signal with frequency
>1kHz and consistent low/high times on this input
0: VSYNC0 Inactive
1: VSYNC0 Active – There is a periodic signal with frequency
>20Hz and consistent low/high times on this input
00: SOG0 Inactive – No transitions detected at the SOG Slicer
output.
01: SOG0 Active – Non-periodic transitions detected at the
SOG Slicer output – possibly valid SOG with a bad slicer
threshold, or simply video with no valid SOG.
10: SOG0 Periodic – There is a periodic signal with frequency
>1kHz and consistent low/high times on this input. This is
most likely a valid SOG signal.
See HSYNC0 Activity description
See VSYNC0 Activity description
See SOG0 Activity description
See HSYNC0 Activity description
See VSYNC0 Activity description
See SOG0 Activity description
See HSYNC0 Activity description
See VSYNC0 Activity description
See SOG0 Activity description
11
December 22, 2006
11 Page | ||
| Páginas | Total 32 Páginas | |
| PDF Descargar | [ Datasheet ISL51002.PDF ] | |
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