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PDF ISL43L711 Data sheet ( Hoja de datos )

Número de pieza ISL43L711
Descripción (ISL43L710 - ISL43L712) Differential SPST Analog Switches
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Data Sheet
ISL43L710, ISL43L711, ISL43L712
April 12, 2007
FN6092.2
Ultra Low ON-Resistance, Single Supply,
Differential SPST Analog Switches
The Intersil ISL43L710, ISL43L711, ISL43L712 devices are
low ON-resistance, low voltage, bidirectional, precision,
differential single-pole/single-throw (SPST) analog switches
designed to operate from a single +1.65V to +3.6V supply.
Targeted applications include battery powered equipment
that benefit from low RON (0.16Ω), low power consumption
(0.12μW) and fast switching speeds (tON = 13ns,
tOFF = 13ns).
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This family of parts may be used to
switch in additional functionality while reducing ASIC design
risk. The ISL43L71X are offered in small form factor
packages, alleviating board space limitations.
The ISL43L710, ISL43L711, ISL43L712 are differential
single-pole/single-throw (SPST) devices. The ISL43L710
has two normally open (NO) switches; the ISL43L711 has
two normally closed (NC) switches; the ISL43L712 has one
normally open (NO) and one normally closed (NC) switch
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and can be used as an SPDT. The ISL43L712 is equipped
with an inhibit pin to simultaneously open all signal paths.
Table 1 summarizes the performance of this family.
TABLE 1. FEATURES AT A GLANCE
ISL43L710 ISL43L711 ISL43L712
NUMBER OF
2
2
2
SWITCHES
SW 1/SW 2
NO/NO
NC/NC
NO/NC
1.8V RON
1.8V tON/tOFF
3V RON
3V tON/tOFF
PACKAGES
0.26Ω
0.26Ω
0.26Ω
30ns/25ns 30ns/25ns 30ns/25ns
0.16Ω
0.16Ω
0.16Ω
13ns/13ns 13ns/13ns 13ns/13ns
8 Ld 3x3 thin DFN, 8 Ld MSOP
Related Literature
Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”.
Application Note AN557 “Recommended Test Procedures
for Analog Switches”.
Features
• Pb-Free Available (RoHS Compliant) (See Ordering info)
• Low ON Resistance (RON)
- V+ = 3.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.16Ω
- V+ = 1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.26Ω
• RON Matching Between Channels. . . . . . . . . . . . . . . 0.005Ω
• RON Flatness Over Signal Range . . . . . . . . . . . . . . . 0.008Ω
• Single Supply Operation. . . . . . . . . . . . . . . . +1.65V to +3.6V
• Low Power Consumption (PD) . . . . . . . . . . . . . . . . . <0.12μW
• Fast Switching Action (V+ = 3.0V)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13ns
• ESD HBM Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >8kV
• 1.8V Logic Compatible (+3V Supply)
• Available in 8 Ld TDFN and 8 Ld MSOP Packages
Applications
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones
- Pagers
- Laptops, Notebooks, Palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio and Video Switching
Truth Table
ISL43L710
ISL43L711
LOGIC
SW 1, 2
SW 1, 2
0
OFF
ON
1 ON OFF
ISL43L712
INH LOGIC
SW 1
SW 2
1X
OFF
OFF
00
OFF
ON
01
ON
OFF
NOTE:
1. Logic “0” 0.5V. Logic “1” 1.4V with a 3V Supply.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 page




ISL43L711 pdf
ISL43L710, ISL43L711, ISL43L712
Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.65V to +2.0V, GND = 0V, VINH = 1.0V, VINL = 0.4V (Notes 7, 9),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP MIN
MAX
(°C) (NOTE 8) TYP (NOTE 8) UNITS
OFF Isolation
RL = 50Ω, CL = 5pF, f = 100kHz, VCOM = 1 VRMS, (See 25
-
62
- dB
Crosstalk (Channel-to-Channel)
Figure 3 and Figure 5)
25 - -94 - dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 6)
25
-
182
- pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 6)
25
-
182
- pF
COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, (See Figure 6)
25
-
290
- pF
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 1.65V to 3.6V, VIN = 0V or V+, all channels on or
off
25
Full
-
-
- 30 nA
- 750 nA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Input Voltage High, VINH
Input Current, IINH, IINL
V+ = 2.0V, VIN = 0V or V+ (Note 10)
Full -
Full 1.0
Full -0.5
-
-
-
0.4 V
-V
0.5 μA
Test Circuits and Waveforms
LOGIC
INPUT
V+
0V
SWITCH
INPUT
VNO
SWITCH
OUTPUT 0V
50%
tOFF
VOUT
90%
tON
tr < 5ns
tf < 5ns
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
V+
C
SWITCH
INPUT
LOGIC
INPUT
NO or NC
IN
GND
COM
VOUT
RL CL
50Ω 35pF
Repeat test for all switches. CL includes fixture and stray
capacitance.
VOUT
=
V(NO or NC)
------------R-----L-------------
RL + R(ON)
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
V+
C
SWITCH
OUTPUT
VOUT
LOGIC
INPUT
ON
ΔVOUT
OFF
V+
ON
0V
RG
VG
Q = ΔVOUT x CL
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
NO or NC
COM
GND
IN
LOGIC
INPUT
FIGURE 2B. TEST CIRCUIT
5
VOUT
CL
FN6092.2
April 12, 2007

5 Page





ISL43L711 arduino
ISL43L710, ISL43L711, ISL43L712
Mini Small Outline Plastic Packages (MSOP)
N
E1 E
INDEX
AREA
A A2
12
TOP VIEW
-B-
0.20 (0.008) A B C
GAUGE
PLANE
0.25
(0.010)
4X θ
R1
R
SEATING
PLANE -C-
L
4X θ
L1
A1 -H-
b
e
D
SEATING
0.10 (0.004) C PLANE
-A-
0.20 (0.008) C
C
SIDE VIEW
a
0.20 (0.008) C D
CL
E1 -B-
END VIEW
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. - H - Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums -A - and - B - to be determined at Datum plane
-H- .
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL
A
A1
A2
b
c
D
E1
MIN
0.037
0.002
0.030
0.010
0.004
0.116
0.116
MAX
0.043
0.006
0.037
0.014
0.008
0.120
0.120
MIN
0.94
0.05
0.75
0.25
0.09
2.95
2.95
MAX
1.10
0.15
0.95
0.36
0.20
3.05
3.05
NOTES
-
-
-
9
-
3
4
e 0.026 BSC
0.65 BSC
-
E
0.187 0.199 4.75
5.05
-
L
0.016 0.028 0.40
0.70
6
L1 0.037 REF
0.95 REF
-
N8
8
R
0.003
-
0.07
-
R1
0.003
-
0.07
-
0 5o 15o 5o 15o
α 0o 6o 0o 6o
7
-
-
-
-
Rev. 2 01/03
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11 FN6092.2
April 12, 2007

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