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ISL22329 の電気的特性と機能

ISL22329のメーカーはIntersil Corporationです、この部品の機能は「Dual Digitally Controlled Potentiometers」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL22329
部品説明 Dual Digitally Controlled Potentiometers
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL22329 Datasheet, ISL22329 PDF,ピン配置, 機能
ISL22329
® Dual Digitally Controlled Potentiometers (XDCP™)
Data Sheet
September 26, 2006
FN6330.1
Low Noise, Low Power, I2C® Bus, 128 Taps,
Wiper Only
The ISL22329 integrates two digitally controlled
potentiometers (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. Each potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up the device recalls the contents of the two
DCP’s IVR to the corresponding WRs.
The DCPs can be used as a voltage divider in a wide variety
of applications including control, parameter adjustments, AC
measurement and signal processing.
Pinout
ISL22329
(10 LD MSOP)
TOP VIEW
www.DataSheet4U.com
A2
SCL
SDA
GND
RW1
1
2
3
4
5
10 RW0
9 SHDN
8 VCC
7 A1
6 A0
Features
• Two potentiometers in one package
• 128 resistor taps
• I2C serial interface
- Three address pins, up to eight devices/bus
• Non-volatile storage of wiper position
• Wiper resistance: 70typical @ 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kor 10ktotal resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T < +55°C
• 10 Ld MSOP
• Pb-free plus anneal product (RoHS compliant)
Ordering Information
PART NUMBER
PART MARKING
RESISTANCE OPTION
(k)
TEMP. RANGE
(°C)
PACKAGE
PKG. DWG. #
ISL22329UFU10Z
(Notes 1, 2)
329UZ
50
-40 to +125
10 Ld MSOP
M10.118
(Pb-free)
ISL22329WFU10Z
(Notes 1, 2)
329WZ
10
-40 to +125
10 Ld MSOP
M10.118
(Pb-free)
NOTES:
1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. Add “-TK” suffix for 1,000 Tape and Reel option
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) and XDCP are registered trademarks of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL22329 pdf, ピン配列
ISL22329
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC+0.3
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP Pin with Respect to GND. . . . . . . -0.3V to VCC
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 4) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV
(CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1kV
Thermal Information
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
10 Lead MSOP package . . . . . . . . . . . . . . . . . . . . .
120
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Recommended Operating Conditions
Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
VCC Voltage for DCP Operation . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -3mA to 3mA
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -0.8V for all pins.
Analog Specifications Over recommended operating conditions unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (NOTE 5) MAX
UNIT
RTOTAL End-to-End Resistance
W option
U option
10 k
50 k
End-to-End Resistance Tolerance
W and U option
-20 +20 %
End-to-End Temperature Coefficient W option
±50 ppm/°C
(Note 13)
U option
±80 ppm/°C
(Note 13)
RW Wiper Resistance
(Note 13)
CW Wiper Capacitance
(Note 13)
VCC = 3.3V @ +25°C,
wiper current = VCC/RTOTAL
70
25 pF
VOLTAGE DIVIDER MODE ( measured at RWi, unloaded; i = 0 or 1)
INL Integral Non-linearity
(Note 10)
Monotonic over all tap positions
-1
1 LSB
(Note 6)
DNL Differential Non-linearity
(Note 9)
Monotonic over all tap positions
-0.5
0.5 LSB
(Note 6)
ZSerror Zero-scale Error
(Note 7)
W option
U option
0 1 5 LSB
(Note 6)
0 0.5 2
FSerror Full-scale Error
(Note 8)
W option
U option
-5 -1
0 LSB
(Note 6)
-2 -1 0
VMATCH DCP to DCP mAtching
(Note 11)
Wipers at the same tap position
-2
2 LSB
(Note 6)
TCV Ratiometric Temperature Coefficient DCP register set to 40 hex
(Note 12)
±4 ppm/°C
3 FN6330.1
September 26, 2006


3Pages


ISL22329 電子部品, 半導体
ISL22329
Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (NOTE 5) MAX
UNIT
tSU:A A2, A1 and A0 Setup Time
Before START condition
600
ns
tHD:A A2, A1 and A0 Hold Time
After STOP condition
600
ns
NOTES:
5. Typical values are for TA = +25°C and 3.3V supply voltage.
6. LSB: [V(RW)127 – V(RW)0]/127. V(RW)127 and V(RW)0 are V(RW) for the DCP register set to 7F hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
7. ZS error = V(RW)0/LSB.
8. FS error = [V(RW)127 – VCC]/LSB.
9. DNL = [V(RW)i – V(RW)i-1]/LSB-1, for i = 1 to 127. i is the DCP register setting.
10. INL = [V(RW)i – i • LSB – V(RW)0]/LSB for i = 1 to 127.
11. VMATCH = [V(RWx)i – V(RWy)i]/LSB, for i = 1 to 127, x = 0 to 1 and y = 0 to 1.
12.
TCV
=
-------M-----a----x----(--V----(---R-----W------)--i--)---–-----M-----i--n----(--V-----(--R-----W------)--i--)------ × ----1----0---6----- for i = 16 to 112 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper
[Max(V(RW)i) + Min(V(RW)i)] ⁄ 2 165°C voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.
13. This parameter is not 100% tested.
14. tWC is the time from a valid STOP condition at the end of a Write sequence of I2C serial interface, to the end of the self-timed internal non-
volatile write cycle.
SDA vs SCL Timing
tF
tHIGH
tLOW
tR
tsp
tHD:STO
SCL
tSU:STA
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tSU:DAT
tHD:STA
tHD:DAT
tAA tDH
tSU:STO
tBUF
A0 and A1 Pin Timing
SCL
START
CLK 1
STOP
SDA
A0, A1
tSU:A
tHD:A
6 FN6330.1
September 26, 2006

6 Page



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