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PDF HI5780 Data sheet ( Hoja de datos )
| Número de pieza | HI5780 | |
| Descripción | A/D Converter | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HI5780 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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HI5780
August 1997
10-Bit, 80 MSPS, High Speed,
Low Power D/A Converter
[ /Title Features
Description
(HI578
0)
/Sub-
ject
(10-
Bit, 80
MSPS,
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . 80 MSPS
• Low Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150mW
• Differential Linearity Error . . . . . . . . . . . . . . . ±0.5 LSB
• TTL/CMOS Compatible Inputs
• Built in Bandgap Voltage Reference
• Power Down and Blanking Control Pins
The HI5780 is a 10-bit, 80 MSPS, high speed, low power
CMOS D/A converter. The converter incorporates a 10-bit input
data register with current outputs. The HI5780 includes a power
down feature that reduces power consumption and a blanking
control. The on-chip bandgap reference can be used to set the
output current range of the D/A.
Ordering Information
High
Speed,
Low
• Direct Replacement for Sony CXD2306
Applications
PART
NUMBER
HI5780JCQ
TEMP.
RANGE (oC)
PACKAGE
PKG. NO.
-20 to 75 32 Ld MQFP Q32.7x7-S
Power
D/A
Con-
verter)
• Wireless Communications
• Direct Digital Frequency Synthesis
• Signal Reconstruction
HI5780-EV
25 Evaluation Kit
/Autho
• Test Equipment
r () • High Resolution Imaging and Graphics Systems
/Key-
• Arbitrary Waveform Generators
wordswww.DataSheet4U.com
(Inter-
sil
Pinout
Corpo-
HI5780
ration,
(MQFP)
Semi-
con-
ductor
Com-
muni-
cations
Divi-
sion,
32 31 30 29 28 27 26 25
D3 1
24 IOUT
D4 2
23 IOUT
D5 3
22 VG
Inter-
D6 4
21 AVDD
sil
Semi-
con-
ductor,
D7
D8
D9 (MSB)
NC
5 20
6 19
7 18
8 17
9 10 11 12 13 14 15 16
AVDD
VREF
REFOUT
IREF
Com-
mLink,
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
10-1716
File Number 4024.4
1 page  
Timing Diagrams (Continued)
tPW1
HI5780
tPW2
CLK
D9-D0
tSU tSU tSU
tHLD
tHLD
tHLD
50%
tPD tSETT
1/2 LSB
CHANGE
IOUT
tSETT
tPD
tPD tSETT
1/2 LSB
CHANGE
FIGURE 3. PROPAGATION DELAY, SETUP TIME AND MINIMUM PULSE WIDTH DIAGRAM
Pin Descriptions
PIN
1-7, 30-32
9
13, 28
15, 27
20, 21
23
25
11
24
23
18
17
19
14
22
PIN NAME
DESCRIPTION
D0 (LSB) thru Digital Data Bit 0, the least significant bit thru digital data Bit 9, the most significant bit.
D9 (MSB)
CLK Data Clock Pin 100kHz to 80MHz.
DVDD
DGND
Digital Logic Supply +5V.
Digital Ground.
AVDD
BLK
AGND
Analog Supply +5V.
Output Blanking pin. When set (‘1’) this pin zeros the IOUT pin.
Analog Ground Supply Current Return pin.
PD Power Down Mode pin. This pin when set (‘1’) places the HI5780 in lower power mode and zeros the
output. Power consumption is reduced.
IOUT
IOUT
REFOUT
IREF
VREF
VB
Current Output pin.
Complementary Current Output pin.
Bandgap Reference Voltage Output.
Reference Current setting resistor connected from here to Ground.
Reference Voltage Input pin.
Bias Voltage Generator Bypass Capacitor connected from here to Ground.
VG Reference Amplifier Bypass Capacitor connected from here to AVDD.
10-1720
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet HI5780.PDF ] | |
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