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HI2302 の電気的特性と機能

HI2302のメーカーはIntersil Corporationです、この部品の機能は「Video A/D Converter」です。


製品の詳細 ( Datasheet PDF )

部品番号 HI2302
部品説明 Video A/D Converter
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HI2302 Datasheet, HI2302 PDF,ピン配置, 機能
®
Pb-Free
DanadtaRSohHeSeCt ompliant
October 25, 2005
HI2302
FN4105.2
8-Bit, 50MSPS, Video A/D Converter with
Clamp Function
The HI2302 is an 8-bit CMOS A/D Converter for video with
synchronizing clamp function. The adoption of two-step
parallel method achieves low power consumption and a
maximum conversion rate of 50MSPS. For pin compatible
lower sample rate converters refer to HI1179 (35MSPS) or
HI1176 (20MSPS) data sheets.
Ordering Information
PART
NUMBER
HI2302JCQ
TEMP.
RANGE (oC)
PACKAGE
-40 to 85 32 Ld MQFP
PKG. NO.
Q32.7x7-S
Applications
• Video Digitizing
• Wireless Receivers
• LCD Projectors/Panels
• Cable Modems
• RGB Graphics Processing
www.DataSheet4U.com
• Camcorders
• Instrumentation
Features
• Resolution . . . . . . . . . . . . . . . . . . . . 8-Bit ±0.5 LSB (DNL)
• Maximum Sampling Frequency . . . . . . . . . . . . . 50 MSPS
• Low Power Consumption . . . . . . . . . . . . . . . . . . . .125mW
(Reference Current Excluded)
• Built-In Input Clamp Function (DC Restore)
• Clamp ON/OFF Function
• Internal Voltage Reference
• Input CMOS/TTL Compatible
• Three-State TTL Compatible Output
• Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . +5V Single
or +5V/3.3V Dual
• Direct Replacement for Sony CXD2302Q
Pinout
HI2302 (MQFP)
TOP VIEW
D0
132
31
30 29 28 27 26 25
24
VRB
D1 2
23 AVSS
D2 3
22 AVSS
D3 4
21 VIN
D4 5
20 AVDD
D5 6
19 AVDD
D6 7
18 VRT
D7
8 17
9 10 11 12 13 14 15 16
VRTS
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1997, 2000, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





HI2302 pdf, ピン配列
HI2302
Absolute Maximum Ratings TA = 25oC
Supply Voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Reference Voltage (VRT, VRB) . . . . . . . . . . .VDD +0.5 to VSS -0.5V
Input Voltage (Analog) (VIN) . . . . . . . . . . . . . VDD +0.5 to VSS -0.5V
Input Voltage (Digital) (VI) . . . . . . . . . . . . . . .VDD +0.5 to VSS -0.5V
Output Voltage (Digital) (VO) . . . . . . . . . . . . .VDD +0.5 to VSS -0.5V
Operating Conditions
Supply Voltage
(AVDD, AVSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 to 5.25V
(DVDD, DVSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0 to 5.5V
(DVSS-AVSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to 100mV
Reference Input Voltage
(VRB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 and Above V
(VRT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 and Below V
Analog Input (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . 1.7VP-P Above
Clock Pulse Width (tPW1, tPW0) . . . . . . . . . . . . . . . . . . . 10ns (Min)
Ambient Temperature (TOPR) . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
122
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . -55oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(MQFP - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications fC = 50 MSPS, AVDD = 5V, DVDD = 3 to 5.5V, VRB = 0.5V, VRT = 2.5V, TA = 25oC
PARAMETER
SYMBOL
TEST CONDITIONS
NOTES MIN TYP
ANALOG CHARACTERISTICS
Maximum Conversion Rate
Minimum Conversion Rate
fC Max
fC Min
Input Bandwidth Full Scale
BW
AVDD = 4.75 to 5.25V, TA = 20 to 75oC, VIN =
0.5 to 2.5V,
fIN = 1kHz Triangular Wave
Envelope
RIN = 33
-1dB
-3dB
50 65
--
- 60
- 100
Differential Nonlinearity Error
Integral Nonlinearity Error
Offset Voltage
Differential Gain Error
Differential Phase Error
ED
EL
EOT
EOB
DG
DP
End Point
Potential Difference to VRT
Potential Difference to VRB
NTSC 40 IRE Mod Ramp
fC = 14.3 MSPS
Note 2
-
-
-70
20
-
-
±0.3
+0.7
-50
40
3
1.5
Sampling Delay
Clamp Offset Voltage
Signal-To-Noise Ratio
Spurious Free Dynamic
tSD
EOC
SNR
SFDR
VIN = DC, CIN = 10µF
tPCW = 2.75µs,
fC = 14.3 MSPS,
fCLP = 15.75kHz
fIN = 100kHz
fIN = 500kHz
fIN = 1MHz
fIN = 3MHz
fIN = 10MHz
fIN = 25MHz
fIN = 100kHz
fIN = 500kHz
fIN = 1MHz
fIN = 3MHz
fIN = 10MHz
fIN = 25MHz
VREF = 0.5V
VREF = 2.5V
-0
0 20
0 20
- 45
- 44
- 44
- 43
- 38
- 32
- 51
- 46
- 49
- 46
- 45
- 45
MAX UNITS
- MSPS
0.5 MSPS
-
-
±0.5
±1.5
-30
60
-
-
-
40
40
MHz
MHz
LSB
LSB
mV
mV
%
Degrees
ns
mV
mV
- dB
- dB
- dB
- dB
- dB
- dB
- dB
- dB
- dB
- dB
- dB
- dB
3


3Pages


HI2302 電子部品, 半導体
Timing Diagrams (Continued)
HI2302
VI (1)
VI (2)
VI (3)
VI (4)
ANALOG INPUT
EXTERNAL CLOCK
UPPER COMPARATORS BLOCK
UPPER DATA
(1) (2) (3) (4)
S (1) C (1) S (2) C (2) S (3) C (3) S (4) C (4)
MD (0)
MD (1)
MD (2)
MD (3)
LOWER REFERENCE VOLTAGE
RV (0)
RV (1)
RV (2)
RV (3)
LOWER COMPARATORS A BLOCK
LOWER DATA A
S (1)
H (1)
LD (-1)
C (1) S (3)
H (3)
LD (1)
C (3)
LOWER COMPARATORS B BLOCK
LOWER DATA B
H (0)
C (0) S (2)
LD (-2)
H (2)
LD (0)
C (2) S (4)
H (4)
LD (2)
DIGITAL OUTPUT
OUT (-2)
OUT (-1)
OUT (0)
OUT (1)
Pin Descriptions
PIN NO.
SYMBOL
1 to 8
D0 to D7
FIGURE 1D. TIMING CHART II
EQUIVALENT CIRCUIT
DVDD
DI
DESCRIPTION
D0 (LSB) to D7 (MSB) Output.
DVSS
6

6 Page



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共有リンク

Link :


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HI2303

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