PDF HI-5040 Data sheet ( Hoja de datos )

Número de pieza	HI-5040
Descripción	(HI-50xx) Wide Analog Signal Range / High Current Capability
Fabricantes	Harris Corporation
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No Preview Available ! HI-5040 thru HI-5051 S E M I C O N D U C T O R HI-5046A and HI-5047A December 1993 CMOS Analog Switches Features Description • ±15V Wide Analog Signal Range • Low “ON” Resistance 25Ω (Typical) • High Current Capability 80mA (Typical) • Break-Before-Make Switching - Turn-On Time 370ns (Typical) - Turn-Off Time 280ns (Typical) • No Latch-Up • Input MOS Gates are Protected from Electrostatic Discharge • DTL, TTL, CMOS, PMOS Compatible Applications • High Frequency Switching • Sample and Hold • Digital Filters • Operational Ampliﬁer Gain Switching This family of CMOS analog switches offers low resistance switching performance for analog voltages up to the supply rails and for signal currents up to 80mA. “ON” resistance is low and stays reasonably constant over the full range of operating signal voltage and current. RON remains exceptionally constant for input voltages between +5V and -5V and currents up to 50mA. Switch impedance also changes very little over temperature, particularly between 0oC and +75oC. RON is nominally 25Ω for HI-5048 through HI-5051 and HI-5046A and HI-5047A and 50Ω for HI-5040 through HI-5047. All devices provide break-before-make switching and are TTL and CMOS compatible for maximum application versatility. Performance is further enhanced by Dielectric Isolation processing which insures latch-free operation with very low input and output leakage currents (0.8nA at +25oC). This family of switches also features very low power operation (1.5mW at +25oC). There are 14 devices in this switch series which are differentiated by type of switch action and value of RON (see Functional Description). All devices are available in 16 lead DIP packages. The HI-5040 and HI-5050 switches can directly replace IH-5040 series devices except IH5048, and are functionally compatible with the DG180 and DG190 family. Each switch type is available in the -55oC to +125oC and 0oC to +75oC performance grades. Functional Description PART NUMBER HI-5040 HI-5041 HI-5042 HI-5043 HI-5044 HI-5045 HI-5046 HI-5046A HI-5047 HI-5047A HI-5048 HI-5049 HI-5050 HI-5051 TYPE SPST Dual SPST SPDT Dual SPDT DPST Dual DPST DPDT DPDT 4PST 4PST Dual SPST Dual DPST SPDT Dual SPDT Functional Block Diagram RON 50Ω 50Ω TYPICAL DIAGRAM S 50Ω 50Ω A NP 50Ω 50Ω D 50Ω 25Ω 50Ω 25Ω 25Ω 25Ω 25Ω 25Ω CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright © Harris Corporation 1993 9-110 File Number 3127 1 page Speciﬁcations HI-5040 Series Absolute Maximum Ratings Thermal Information Supply Voltage (V+, V-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V VR to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+, V- Digital and Analog Input Voltage . . . . . +VSUPPLY +4V, -VSUPPLY -4V Analog Current (S to D) Continuous. . . . . . . . . . . . . . . . . . . . . 30mA Analog Current (S to D) Peak. . . . . . . . . . . . . . . . . . . . . . . . . . 80mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC Thermal Resistance Ceramic DIP Package . . . . . . . . . . . . . . . SOIC Package. . . . . . . . . . . . . . . . . . . . . Plastic DIP Package . . . . . . . . . . . . . . . . PLCC Package . . . . . . . . . . . . . . . . . . . . CLCC Package . . . . . . . . . . . . . . . . . . . . θJA 80oC/W 120oC/W 100oC/W 80oC/W 75oC/W θJC 24oC/W - - - 20oC/W Junction Temperature Plactic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150oC Ceramic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Operating Temperature Range HI-50XX-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC HI-50XX-5, -7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +75oC HI-50XX-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied. Electrical Speciﬁcations Supplies = +15V, -15V; VR = 0V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, VL = +5V, Unless Otherwise Speciﬁed. For Test Conditions, Consult Performance Characteristics, Unused Pins are Grounded. PARAMETER TEST CONDITIONS SWITCHING CHARACTERISTICS tON, Switch On Time tOFF, Switch Off Time Charge Injection (Note 4) (Note 4) (Note 2) “Off Isolation” (Note 3) “Crosstalk” (Note 3) CS(OFF), Input Switch Capacitance CD(OFF), Output Switch Capacitance CD(ON), Output Switch Capacitance CA, Digital Input Capacitance CDS(OFF), Drain-To-Source Capacitance DIGITAL INPUT CHARACTERISTICS VAL, Input Low Threshold VAH, Input High Threshold IA, Input Leakage Current (High or Low) ANALOG SWITCH CHARACTERISTICS Analog Signal Range RON, On Resistance (Note 1A) RON, On Resistance (Note 1B) RON, Channel-to-Channel Match RON, Channel-to-Channel Match IS(OFF) = ID(OFF), Off Input or Output Leakage Current (Note 1A) (Note 1B) TEMP +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC Full Full Full Full +25oC Full +25oC Full +25oC +25oC +25oC Full -55oC To +125oC MIN TYP MAX 0oC To +75oC MIN TYP MAX UNITS - 370 500 - 370 500 ns - 280 500 - 280 500 ns - 5 20 - 5 - mV 75 80 - - 80 - dB 80 88 - - 88 - dB - 11 - - 11 - pF - 11 - - 11 - pF - 22 - - 22 - pF - 5 - - 5 - pF - 0.5 - - 0.5 - pF - - 0.8 2.4 - - - 0.01 1.0 - - 0.8 2.4 - - - 0.01 1.0 V V µA -15 - +15 -15 - +15 - 50 75 - 50 75 - - 150 - - 150 - 25 45 - 25 45 - - 50 - - 50 - 2 10 - 2 10 - 15 - 15 - 0.8 2 - 0.8 2 - 100 200 - 100 200 V Ω Ω Ω Ω Ω Ω nA nA 9-114 5 Page HI-5040 Series Switching Characteristics (Continued) A1 (A2) V+ IN P2 A1 (A2) N1 N2 N3 V- P1 FIGURE 15. SWITCH CELL OUT V+ P3 V+ R4 A 200Ω D1 D2 V- P1 N1 VR' VL' P2 N2 P5 P4 P6 P7 N6 N7 N4 N5 P8 P9 P10 P11 N8 N9 N10 N11 N3 V- NOTES: 1. All n-channel bodies to V-, all p-channel bodies to V+ except as shown. 2. For further information refer to Application Notes 520, 521, 531, 532 and 557. FIGURE 16. DIGITAL INPUT BUFFER AND LEVEL SHIFTER P12 A1 A1 A2 A2 N12 9-120 11 Page

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