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PDF USB97C201 Data sheet ( Hoja de datos )
| Número de pieza | USB97C201 | |
| Descripción | USB 2.0 ATA/ ATAPI Controller | |
| Fabricantes | SMSC Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de USB97C201 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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USB97C201
Rev 1.6
www.DataSheet4U.com
USB 2.0 ATA/ ATAPI Controller
FEATURES
2.5 Volt, Low Power Core Operation
3.3 Volt I/O with 5V input tolerance
Complete USB Specification 2.0 Compatibility
- Includes USB 2.0 Transceiver
- A Bi-directional Control, a Bi-directional
Interrupt, and a Bi-directional Bulk Endpoint
are provided.
Complete System Solution for interfacing ATA or
ATAPI devices to USB 2.0 bus
- Supports USB Mass Storage Compliant
Bootable BIOS
- Support for ATAPI Devices:
- CD-ROM
- CD-R
- CD-RW
- DVD
- DVD/R/W
8051 8 bit microprocessor
- Provides low speed control functions
- 30 Mhz execution speed at 4 cycles per
instruction average
- 768 Bytes of internal SRAM for general
purpose scratchpad or program execution
while re-flashing external ROM
Double Buffered Bulk Endpoint
- Bi-directional 512 Byte Buffer for Bulk Endpoint
- 64 Byte RX Control Endpoint Buffer
- 64 Byte TX Control Endpoint Buffer
- 64 Byte TX Interrupt Endpoint Buffer
- 64 Byte RX Interrupt Endpoint Buffer
External Program Memory Interface
- 64K Byte Code Space
- Flash, SRAM, or EPROM Memory
On Board 12Mhz Crystal Driver Circuit
Internal PLL for 480Mhz USB2.0 Sampling, 30Mhz
MCU clock, and 60Mhz ATA clock
Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used
8 GPIOs for special function use : LED indicators,
button inputs, etc.
- Inputs capable of generating interrupts with
either edge sensitivity
- One GPIO has automatic ½ sec toggle
capability for flashing an LED indicator.
100 Pin TQFP Package (14.0 x 14.0 mm footprint)
- 25% smaller body size than other 100 pin
TQFP Packages
100 Pin QFP Package
ORDERING INFORMATION
Order Number(s):
USB97C201-MN
for 100 pin TQFP package
USB97C201-MC
for 100 pin QFP package
SMSC USB97C201
Page 1
DATASHEET
Rev. 11-05-03
1 page  
Table 65 – RAMWR_TOGGLE State Control ..............................................................................................................51
FIGURES
Figure 1 - MCU to EXTERNAL CODE SPACE MAP....................................................................................................14
Figure 2 - GPIO MUXING BLOCK DIAGRAM..............................................................................................................23
Figure 3 - RECEIVE BUFFER OPERATION................................................................................................................51
Figure 4 - TRANSMIT BUFFER OPERATION .............................................................................................................52
Figure 5 - AUTOMATIC DATA TRANSFER OPERATION..........................................................................................53
Figure 6 - 100 PIN TQFP PACKAGE ...........................................................................................................................57
Figure 7 – 100 PIN QFP PACKAGE ............................................................................................................................58
SMSC USB97C201
Page 5
DATASHEET
Rev. 11-05-03
5 Page 
USB Bus
Data
USB
Transceiver
Filter
USB
Transceiver
Bias
Termination
Resistor
Full Speed
USB Data
USB-
USB+
LOOPFLTR
RBIAS
RTERM
FS-
FS+
USB INTERFACE
IO-U These pins connect to the USB bus data
signals.
This pin provides the ability to supplement the
internal filtering of the transceiver with an
external network, if required.
A 9.09 Kohm precision resistor is attached
from ground to this pin to set the transceiver’s
internal bias currents.
IO-U
A precision 1.5Kohm precision resistor is
attached to this pin from a 3.3V supply.
These pins connect to the USB- and USB+
pins through 31.6 ohm series resistors.
Memory Data MD[7:0]
Bus
Memory
MA[15:0]
Address Bus
Memory Write nMWR
Strobe
Memory Read nMRD
Strobe
IO Read
Strobe
nIOR
IO Write
Strobe
nIOW
MEMORY/IO INTERFACE
IO12
These signals are used to transfer data
between the internal CPU and the external
program memory.
O12 These signals address memory locations within
the external memory.
O12 Program Memory Write; active low
O12 Program Memory Read; active low
O12 XDATA space Read; active low
O12 XDATA space Write; active low
SMSC USB97C201
Page 11
DATASHEET
Rev. 11-05-03
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet USB97C201.PDF ] | |
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