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PDF HI5810 Data sheet ( Hoja de datos )
| Número de pieza | HI5810 | |
| Descripción | Sampling A/D Converter | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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HI5810
August 1997
CMOS 10 Microsecond, 12-Bit, Sampling
A/D Converter with Internal Track and Hold
Features
• Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . . 10µs
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . .100 KSPS
• Built-In Track and Hold
• Single Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . +5V
• Maximum Power Consumption. . . . . . . . . . . . . . .40mW
• Internal or External Clock
• 1MHz Input Bandwidth . . . . . . . . . . . . . . . . . . . . . -3dB
Applications
• Remote Low Power Data Acquisition Systems
• Digital Audio
• DSP Modems
• General Purpose DSP Front End
• µP Controlled Measurement Systems
• Process Controls
• Industrial Controls
Description
The HI5810 is a fast, low power, 12-bit, successive-
approximation, analog-to-digital converter. It can operate from
a single 3V to 6V supply and typically draws just 1.9mA when
operating at 5V. The HI5810 features a built-in track and hold.
The conversion time is as low as 10µs with a 5V supply.
The twelve data outputs feature full high speed CMOS three-
state bus driver capability, and are latched and held through a
full conversion cycle. The output is user selectable: [i.e.,
12-bit, 8-bit (MSBs), and/or 4-bit (LSBs)]. A data ready flag,
and conversion-start input complete the digital interface.
An internal clock is provided and is available as an output.
The clock may also be over-driven by an external source.
Ordering Information
PART
NUMBER
HI5810JIP
HI5810KIP
HI5810JIB
HI5810KIB
HI5810JIJ
HI5810KIJ
INL (LSB)
(MAX OVER
TEMP.)
±2.5
±2.0
±2.5
±2.0
±2.5
±2.0
TEMP.
RANGE
(oC)
PACKAGE
PKG.
NO.
-40 to 85 24 Ld PDIP E24.3
-40 to 85 24 Ld PDIP E24.3
-40 to 85 24 Ld SOIC M24.3
-40 to 85 24 Ld SOIC M24.3
-40 to 85 24 Ld CERDIP F24.3
-40 to 85 24 Ld CERDIP F24.3
Pinout
HI5810
(PDIP, CERDIP, SOIC)
TOP VIEW
DRDY 1
(LSB) D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
D8 10
D9 11
VSS 12
24 VDD
23 OEL
22 CLK
21 STRT
20 VREF-
19 VREF+
18 VIN
17 VAA+
16 VAA-
15 OEM
14 D11 (MSB)
13 D10
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
6-1777
File Number 3633.1
1 page  
Timing Diagrams
CLK
(EXTERNAL
OR INTERNAL)
1
STRT
DRDY
23
tD1DRDY
tD2DRDY
HI5810
4
5 - 14
15
tLOW
12
tHIGH
3
D0 - D11
VIN
OEL = OEM = VSS
DATA N - 1
TRACK N
HOLD N
FIGURE 1. CONTINUOUS CONVERSION MODE
DATA N
TRACK N + 1
CLK
(EXTERNAL)
STRT
DRDY
VIN
15 1 2 2 2 3 4 5
tRSTRT
tSUSTRT
tWSTRT
tD3DRDY
HOLD
TRACK
HOLD
FIGURE 2. SINGLE SHOT MODE EXTERNAL CLOCK
6-1781
5 Page 
HI5810
Total Harmonic Distortion
The total harmonic distortion (THD) is the ratio of the RMS
sum of the second through sixth harmonic components to
the fundamental RMS signal for a specified input and
sampling frequency.
Spurious-Free Dynamic Range
The spurious-free dynamic range (SFDR) is the ratio of the
fundamental RMS amplitude to the RMS amplitude of the
next largest spur or spectral component. If the harmonics
are buried in the noise floor it is the largest peak.
Total Harmonic Power (2nd - 6th Harmonic)
THD = 10Log
Sinewave Signal Power
Sinewave Signal Power
SFDR = 10Log
Highest Spurious Signal Power
TABLE 2. CODE TABLE
CODE
DESCRIPTION
INPUT
VOLTAGE†
VREF+ = 4.608V
VREF- = 0V
(V)
BINARY OUTPUT CODE
MSB
LSB
DECIMAL
COUNT D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Full Scale (FS)
4.6069
4095
1 1 1 1 11 1 1 11 1
FS - 1 LSB
3/4 FS
1/2 FS
1/4 FS
1 LSB
4.6058
3.4560
2.3040
1.1520
0.001125
4094
3072
2048
1024
1
1 1 1 1 11 1 1 11 1
1 1 0 0 00 0 0 00 0
1 0 0 0 00 0 0 00 0
0 1 0 0 00 0 0 00 0
0 0 0 0 00 0 0 00 0
Zero
0 0 0 0 0 0 00 0 0 00 0
†The voltages listed above represent the ideal lower transition of each output code shown as a function of the reference voltage.
1
0
0
0
0
1
0
+5V
VREF
10µF
4.7µF
0.1µF
0.01µF
0.1µF
0.001µF
ANALOG
INPUT
VAA+
VDD
VREF+
D1... 1
D0
DRDY
OEM
VIN OEL
STRT
CLK
VREF- VAA-
VSS
0.1µF
4.7µF
OUTPUT
DATA
1.5MHz CLOCK
FIGURE 17. GROUND AND SUPPLY DECOUPLING
6-1787
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet HI5810.PDF ] | |
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