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PDF AP393 Data sheet ( Hoja de datos )
| Número de pieza | AP393 | |
| Descripción | LOW POWER LOW OFFSET VOLTAGE DUAL COMPARATORS | |
| Fabricantes | Anachip | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AP393 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
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Low Power Low Offset Voltage Dual Comparators
AP393
Features
- Wide supply
Voltage range: 2.0V to 36V
Single or dual supplies: ±1.0V to ±18V
- Very low supply current drain (0.4 mA) –
independent of supply voltage
- Low input biasing current: 25 nA
- Low input offset current: ±5 nA
- Maximum offset voltage: ±3 mV
- Input common-mode voltage range includes
ground
- Differential input voltage range equal to the power
supply voltage
- Low output saturation voltage: 250 mV at 4 mA
- Output voltage compatible with TTL, DTL, ECL,
MOS and CMOS logic systems
- 8-pin PDIP and SOP Pb-Free packages
Advantages
- High precision comparators
- Reduced VOS drift over temperature
- Eliminates need for dual supplies
- Allows sensing near ground
- Compatible with all forms of logic
- Power drain suitable for battery operation
General Description
The AP393 consists of two independent precision
voltage comparators with an offset voltage
specification as low as 2.0 mV max for two
comparators which were designed specifically to
operate from a single power supply over a wide
range of voltages. Operation from split power
supplies is also possible and the low power supply
current drain is independent of the magnitude of the
power supply voltage. These comparators also
have a unique characteristic in that the input
common-mode voltage range includes ground,
even though operated from a single power supply
voltage.
Application areas include limit comparators, simple
analog to digital converters; pulse, squarewave and
time delay generators; wide range VCO; MOS clock
timers; multivibrators and high voltage digital logic
gates. The AP393 is designed to directly interface
with TTL and CMOS. When operated from both
plus and minus power supplies, the AP393 will
directly interface with MOS logic where their low
power drain is a distinct advantage over standard
comparators.
Pin Assignment
(Top View)
OUTPUT 1 1
INVERTING INPUT 1 2
NON-INVERTING INPUT 1 3
GND 4
8 V+
AP393
7 OUTPUT 2
6 INVERTING INPUT 2
5 NON-INVERTING INPUT 2
SOP-8L/PDIP-8L
Pin Descriptions
Pin Name
Pin
No.
OUTPUT 1 1
INVERTING
INPUT 1
2
NON-INVERT
ING INPUT 1
3
GND
4
Description
Channel 1 Output
Channel 1 Negative Input
Channel 1 Positive Input
Ground
Pin Name
Pin
No.
NON-INVERT
ING INPUT 2
5
INVERTING
INPUT 2
6
OUTPUT 2
V+
7
8
Description
Channel 2 Positive Input
Channel 2 Negative Input
Channel 2 Output
Vcc
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev. 1.0 Sep 7, 2004
1/13
1 page  
Low Power Low Offset Voltage Dual Comparators
AP393
Typical Circuit (Continued) (VCC =5.0VDC)
V+
R1 D1
1M 1N914 * 15K
R2 D2
100K 1N914
+15VDC
80 pF
1M
-
1/2 AP393
+
6µs
60µs
tOt1 t2
-V+
0
VO
1M
1M *For large ratios of R1/R2, D1 can
be omitted
Pulse Generator
V+
200K
0.1µF
100K
-
1/2 AP393
+
2.0K
V+
0
VO
200K
CRYSTAL
f=100KHz
Crystal Controlled Oscillator
+VC
FREQUENCY
CONTROL
VOLTAGE
INPUT
100K
10
0.1µF
V+
100K
- 500pF
1/2 AP393
+
3.0K
5.1K
+
0.01µF
1/2 AP393
20K
50K 20K
V+/2
-
- V+/2
1/2 AP393
V+
3.0K
OUTPUT1
OUTPUT2
+
Two-Decade High Frequency VCO
V*=+30VDC
+250mVDC < VC < +50VDC
700Hz < fO < 100KHz
V+
V+
+VIN
+VREF
+
1/2 AP393
-
3.0K
VO
+VREF
10K
+VIN
-
1/2 AP393
+
10M
3K
VO
Basic Comparator
Non-Inverting Comparator with
Hysteresis
Anachip Corp.
www.anachip.com.tw
Rev. 1.0 Sep 7, 2004
5/13
5 Page 
Low Power Low Offset Voltage Dual Comparators
AP393
Application Information
The AP393 is high gain, wide bandwidth devices
which, like most comparators, can easily oscillate if
the output lead is inadvertently allowed to
capacitively couple to the inputs via stray
capacitance. This shows up only during the output
voltage transition intervals as the comparator
change states. Power supply bypassing is not
required to solve this problem. Standard PC board
layout is helpful as it reduces stray input-output
coupling. Reducing the input resistors to < 10kΩ
reduces the feedback signal levels and finally,
adding even a small amount (1.0 to 10 mV) of
positive feedback (hysteresis) causes such a rapid
transition that oscillations due to stray feedback are
not possible. Simply socketing the IC and attaching
resistors to the pins will cause input-output
oscillations during the small transition intervals
unless hysteresis is used. If the input signal is a
pulse waveform, with relatively fast rise and fall
times, hysteresis is not required. All input pins of
any unused comparators should be tied to the
negative supply.
The bias network of the AP393 establishes a drain
current which is independent of the magnitude of
the power supply voltage over the range of from 2.0
VDC to 30 VDC. It is usually unnecessary to use a
bypass capacitor across the power supply line.
The differential input voltage may be larger than V+
without damaging the device (Note 8). Protection
should be provided to prevent the input voltages
from going negative more than -0.3 VDC (at 25°C).
An input clamp diode can be used as shown in the
applications section.
The output of the AP393 is the uncommitted
collector of a grounded-emitter NPN output
transistor. Many collectors can be tied together to
provide an output OR’ing function. An output pull-up
resistor can be connected to any available power
supply voltage within the permitted supply voltage
range and there is no restriction on this voltage due
to the magnitude of the voltage which is applied to
the V+ terminal of the AP393 package. The output
can also be used as a simple SPST switch to
ground (when a pull-up resistor is not used). The
amount of current which the output device can sink
is limited by the drive available (which is
independent of V+) and the β of this device. When
the maximum current limit is reached
(approximately 16mA), the output transistor will
come out of saturation and the output voltage will
rise very rapidly. The output saturation voltage is
limited by the approximately 60Ω rSAT of the output
transistor. The low offset voltage of the output
transistor (1.0 mV) allows the output to clamp
essentially to ground level for small load currents.
Marking Information
Logo
Part No.
(Top View)
85
AP393
YY WW X
14
SOP-8L/PDIP-8L
ID code: internal
Xth week: 01~52
Year: "01" =2001
"02" =2002
Anachip Corp.
www.anachip.com.tw
11/13
Rev. 1.0 Sep 7, 2004
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet AP393.PDF ] | |
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