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UC3845のメーカーはON Semiconductorです、この部品の機能は「(UC3844 / UC3845) High Performance Current Mode Controllers」です。 |
部品番号 | UC3845 |
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部品説明 | (UC3844 / UC3845) High Performance Current Mode Controllers | ||
メーカ | ON Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとUC3845ダウンロード(pdfファイル)リンクがあります。 Total 16 pages
UC3844, UC3845, UC2844,
UC2845
High Performance
Current Mode Controllers
The UC3844, UC3845 series are high performance fixed frequency
current mode controllers. They are specifically designed for Off−Line
and DC−to−DC converter applications offering the designer a cost
effective solution with minimal external components. These integrated
circuits feature an oscillator, a temperature compensated reference, high
gain error amplifier, current sensing comparator, and a high current
totem pole output ideally suited for driving a power MOSFET.
Also included are protective features consisting of input and
reference undervoltage lockouts each with hysteresis, cycle−by−cycle
current limiting, a latch for single pulse metering, and a flip−flop which
blanks the output off every other oscillator cycle, allowing output dead
times to be programmed for 50% to 70%.
These devices are available in an 8−pin dual−in−line plastic package
as well as the 14−pin plastic surface mount (SOIC−14). The SOIC−14
package has separate power and ground pins for the totem pole output
stage.
The UCX844 has UVLO thresholds of 16 V (on) and 10 V (off),
ideally suited for off−line converters. The UCX845 is tailored for
lower voltage applications having UVLO thresholds of 8.5 V (on) and
7.6 V (off).
Features
www.DataSheet4U.com
• Current Mode Operation to 500 kHz Output Switching Frequency
• Output Deadtime Adjustable from 50% to 70%
• Automatic Feed Forward Compensation
• Latching PWM for Cycle−By−Cycle Current Limiting
• Internally Trimmed Reference with Undervoltage Lockout
• High Current Totem Pole Output
• Input Undervoltage Lockout with Hysteresis
• Low Startup and Operating Current
• Direct Interface with ON Semiconductor SENSEFETt Products
• Pb−Free Packages are Available
VCC 7(12)
Vref
8(14)
RTCT
4(7)
Voltage
Feedback
2(3)
1(1)
Output
Comp.
R
5.0V
Reference
VCC
Undervoltage
Lockout
R
Vref
Undervoltage
Lockout
Oscillator
+
−
Error
Amplifier
Flip
Flop
&
Latching
PWM
GND 5(9)
Pin numbers in parenthesis are for the D suffix SOIC−14 package.
Figure 1. Simplified Block Diagram
VC
7(11)
Output
6(10)
PWR GND
5(8)
Current
Sense
3(5)
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 7
1
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8
1
14
1
8
1
PDIP−8
N SUFFIX
CASE 626
SOIC−14
D SUFFIX
CASE 751A
SOIC−8
D1 SUFFIX
CASE 751A
PIN CONNECTIONS
Compensation 1
Voltage Feedback 2
Current Sense 3
RT/CT 4
8 Vref
7 VCC
6 Output
5 GND
(Top View)
Compensation 1
NC 2
Voltage Feedback 3
NC 4
Current Sense 5
NC 6
RT/CT 7
14 Vref
13 NC
12 VCC
11 VC
10 Output
9 GND
8 Power Ground
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page page 14 of this data sheet.
Publication Order Number:
UC3844/D
1 Page UC3844, UC3845, UC2844, UC2845
ELECTRICAL CHARACTERISTICS (VCC = 15 V, (Note 4), RT = 10 k, CT = 3.3 nF, TA = Tlow to Thigh (Note 5), unless otherwise noted.)
UC284X
UC384X
Characteristics
Symbol
Min Typ Max Min Typ Max Unit
ERROR AMPLIFIER SECTION (continued)
Unity Gain Bandwidth (TJ = 25°C)
Power Supply Rejection Ratio (VCC = 12 V to 25 V)
Output Current
Sink (VO = 1.1 V, VFB = 2.7 V)
Source (VO = 5.0 V, VFB = 2.3 V)
Output Voltage Swing
High State (RL = 15 k to ground, VFB = 2.3 V)
Low State (RL = 15 k to Vref, VFB = 2.7 V)
CURRENT SENSE SECTION
Current Sense Input Voltage Gain (Notes 6 & 7)
Maximum Current Sense Input Threshold (Note 6)
Power Supply Rejection Ratio
VCC = 12 V to 25 V (Note 6)
Input Bias Current
Propagation Delay (Current Sense Input to Output)
OUTPUT SECTION
Output Voltage
Low State (ISink = 20 mA)
(ISink = 200 mA)
High State (ISink = 20 mA)
(ISink = 200 mA)
Output Voltage with UVLO Activated
VCC = 6.0 V, ISink = 1.0 mA
Output Voltage Rise Time (CL = 1.0 nF, TJ = 25°C)
Output Voltage Fall Time (CL = 1.0 nF, TJ = 25°C)
UNDERVOLTAGE LOCKOUT SECTION
Startup Threshold
UCX844
UCX845
BW
PSRR
ISink
ISource
VOH
VOL
0.7 1.0 − 0.7 1.0 − MHz
60 70 − 60 70 − dB
2.0 12 − 2.0 12 −
−0.5 −1.0 − −0.5 −1.0 −
mA
5.0 6.2 − 5.0 6.2 −
− 0.8 1.1 − 0.8 1.1
V
AV
Vth
PSRR
IIB
tPLH(IN/OUT)
2.85 3.0 3.15 2.85 3.0 3.15
0.9 1.0 1.1 0.9 1.0 1.1
− 70 −
− 70 −
− −2.0 −10 − −2.0 −10
− 150 300 − 150 300
V/V
V
dB
mA
ns
VOL
VOH
VOL(UVLO)
tr
tf
− 0.1 0.4
− 1.6 2.2
12 13.5
−
12 13.4
−
− 0.1 0.4
− 1.6 2.2
13 13.5
−
12 13.4
−
V
V
− 0.1 1.1 − 0.1 1.1
−
50 150
−
50 150 ns
−
50 150
−
50 150 ns
Vth V
15 16 17 14.5 16 17.5
7.8 8.4 9.0 7.8 8.4 9.0
Minimum Operating Voltage After Turn−On
UCX844
UCX845
VCC(min)
V
9.0 10 11 8.5 10 11.5
7.0 7.6 8.2 7.0 7.6 8.2
PWM SECTION
Duty Cycle
Maximum
Minimum
DCmax
DCmin
46 48 50 47 48
−−0−−
TOTAL DEVICE
Power Supply Current (Note 4)
Startup:
(VCC = 6.5 V for UCX845A,
(VCC 14 V for UCX844) Operating
ICC
− 0.5 1.0 − 0.5
− 12 17 − 12
Power Supply Zener Voltage (ICC = 25 mA)
VZ 30 36 − 30 36
4. Adjust VCC above the Startup threshold before setting to 15 V.
5. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
Tlow = 0°C for UC3844, UC3845
−25°C for UC2844, UC2845
Thigh = +70°C for UC3844, UC3845
+85°C for UC2844, UC2845
6. This parameter is measured at the latch trip point with VFB = 0 V.
7.
Comparator gain is defined as: AV
DV Output Compensation
DV Current Sense Input
50
0
1.0
17
−
%
mA
V
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3
3Pages UC3844, UC3845, UC2844, UC2845
VCC = 30 V
CL = 15 pF
TA = 255C
100 ns/DIV
Figure 14. Output Cross Conduction
25
20
15
10 RT = 10 k
CT = 3.3 nF
VFB = 0 V
5 ISense = 0 V
TA = 255C
0
0 10 20 30 40
VCC, SUPPLY VOLTAGE (V)
Figure 15. Supply Current versus
Supply Voltage
PIN FUNCTION DESCRIPTION
Pin
8−Pin 14−Pin
Function
1 1 Compensation
23
Voltage
Feedback
3 5 Current Sense
47
5−
6 10
RT/CT
GND
Output
7 12
VCC
8 14
Vref
− 8 Power Ground
− 11
−9
− 2,4,6,13
VC
GND
NC
Description
This pin is Error Amplifier output and is made available for loop compensation.
This is the inverting input of the Error Amplifier. It is normally connected to the switching
power supply output through a resistor divider.
A voltage proportional to inductor current is connected to this input. The PWM uses this
information to terminate the output switch conduction.
The Oscillator frequency and maximum Output duty cycle are programmed by connecting
resistor RT to Vref and capacitor CT to ground. Operation to 1.0 MHz is possible.
This pin is combined control circuitry and power ground (8−pin package only).
This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are
sourced and sunk by this pin. The output switches at one−half the oscillator frequency.
This pin is the positive supply of the control IC.
This is the reference output. It provides charging current for capacitor CT through resistor RT.
This pin is a separate power ground return (14−pin package only) that is connected back to
the power source. It is used to reduce the effects of switching transient noise on the control
circuitry.
The Output high state (VOH) is set by the voltage applied to this pin (14−pin package only).
With a separate power source connection, it can reduce the effects of switching transient
noise on the control circuitry.
This pin is the control circuitry ground return (14−pin package only) and is connected to back
to the power source ground.
No connection (14−pin package only). These pins are not internally connected.
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