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PDF CMX865 Data sheet ( Hoja de datos )

Número de pieza CMX865
Descripción FSK Modem and DTMF Codec
Fabricantes CML 
Logotipo CML Logotipo



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No Preview Available ! CMX865 Hoja de datos, Descripción, Manual

CML Microcircuits
COMMUNICATION SEMICONDUCTORS
D/865/3 November 2005
Features
V.23 1200/75, 1200/1200, 75, 1200 bps FSK
Bell 202 1200/150, 1200/1200, 150, 1200 bps FSK
Bell 103 300/300 bps FSK
Low Voice Falsing DTMF Decoder
DTMF/Tones Transmit and Receive
Low Power - High Performance
Software and Hardware Compatible with CMX86x
Family of Wireline Products
CMX865
FSK Modem and
DTMF Codec
Provisional Issue
Applications
Wireless Local Loops
SMS Phones
Security Systems
Remote Utility Meter Reading
Industrial Control Systems
Pay-Phones
Set-Top Boxes
www.DataSheet4U.com
1. Brief Description
The CMX865 is a multi-standard modem for use in telephone based information and telemetry systems.
Control of the device is via a simple high speed serial bus, compatible with most types of µC serial
interface. The data transmitted and received by the modem is also transferred over the same serial bus.
On-chip programmable Tx and Rx USARTs are provided for use with asynchronous data and allow
unformatted synchronous data to be received or transmitted as 8-bit words.
A high-quality DTMF decoder with excellent immunity to falsing on voice and a standard DTMF encoder
are included. Alternatively, these blocks can be used to transmit and detect user-specific, programmed
single and dual-tone signals, call progress signals or modem calling and answering tones.
Flexible line driver and receive hybrid circuits are integrated on chip, requiring only passive external
components to build a 2 or 4-wire line interface.
The device also features a Hook Switch Relay Drive output and a Ring Detector circuit which continues to
function when the device is in the powersave mode, providing an interrupt which can be used to wake up
the host µController when line voltage reversal or ringing is detected.
The CMX865 operates from a single 3.0 to 3.6V supply over a temperature range of -40°C to +85°C and
is available in a 24-pin SOIC package.
© 2005 CML Microsystems Plc

1 page




CMX865 pdf
FSK Modem and DTMF Codec
Notes:
I/P
O/P
BI
T/S
NC
=
=
=
=
=
Input
Output
Bidirectional
3-state Output
No Connection
4. External Components
CMX865
R1 68k
X1 11.0592MHz
or 12.288MHz
C1, C2
C3, C4
C5
22pF
100nF
10uF
Resistors ±5%, capacitors ±20% unless otherwise stated.
Figure 2 Recommended External Components for a Typical Application
This device is capable of detecting and decoding small amplitude signals. To achieve this, VDD and VBIAS
should be decoupled and the receive path protected from extraneous in-band signals. It is recommended
that the printed circuit board is laid out with a VSS ground plane in the CMX865 area to provide a low
impedance connection between the VSS pins and the VDD and VBIAS decoupling capacitors. The VSS
connections to the Xtal oscillator capacitors C1 and C2 should also be low impedance and preferably be
part of the VSS ground plane to ensure reliable start up of the oscillator.
For best results, an Xtal oscillator design should drive the clock inverter input with signal levels of at least
40% of VDD peak-to-peak. Tuning-fork Xtals generally cannot meet this requirement. To obtain Xtal
oscillator design assistance, please consult your Xtal manufacturer.
© 2005 CML Microsystems Plc
5
D/865/3

5 Page





CMX865 arduino
FSK Modem and DTMF Codec
CMX865
5.1 Tx USART
A flexible Tx USART is provided for all modem modes. It can be programmed to transmit continuous
patterns, Start-Stop characters or Synchronous Data.
In both Synchronous Data and Start-Stop modes the data to be transmitted is written by the µC into the 8-
bit C-BUS Tx Data Register from which it is transferred to the Tx Data Buffer.
If Synchronous Data mode has been selected the 8 data bits in the Tx Data Buffer are transmitted serially,
b0 being sent first.
In Start-Stop mode a single Start bit is transmitted, followed by 5, 6, 7 or 8 data bits from the Tx Data
Buffer - b0 first - followed by an optional Parity bit then - normally - one or two Stop bits. The Start, Parity
and Stop bits are generated by the USART as determined by the Tx Mode Register settings and are not
taken from the Tx Data Register.
Figure 5a Tx USART
Every time the contents of the C-BUS Tx Data Register are transferred to the Tx Data Buffer the Tx Data
Ready flag bit of the Status Register is set to 1 to indicate that a new value should be loaded into the C-
BUS Tx Data Register. This flag bit is cleared to 0 when a new value is loaded into the Tx Data Register.
Figure 5b Tx USART Function (Start-Stop mode, 8 Data Bits + Parity)
If a new value is not loaded into the Tx Data Register in time for the next Tx Data Register to Tx Data
Buffer transfer then the Status Register Tx Data Underflow bit will be set to 1. In this event the contents of
the Tx Data Buffer will be re-transmitted if Synchronous Data mode has been selected, or if the Tx
modem is in Start-Stop mode then a continuous Stop signal (1) will be transmitted until a new value is
loaded into the Tx Data Register.
In all modes the transmitted bit and baud rates are the nominal rates for the selected modem type, with an
accuracy determined by the XTAL frequency accuracy.
© 2005 CML Microsystems Plc
11
D/865/3

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