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USBULC6-2F3のメーカーはST Microelectronicsです、この部品の機能は「Dual ultra low capacitance protection」です。 |
部品番号 | USBULC6-2F3 |
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部品説明 | Dual ultra low capacitance protection | ||
メーカ | ST Microelectronics | ||
ロゴ | |||
このページの下部にプレビューとUSBULC6-2F3ダウンロード(pdfファイル)リンクがあります。 Total 8 pages
USBULC6-2F3
IPAD™
Dual ultra low capacitance protection for high speed USB
Main application
■ Hi-Speed USB port in wireless handsets (up to
480 Mb/s according to USB 2.0 High Speed
Specification)
Features
■ Ultra low diode capacitance (1.2 pF max)
■ Two data lines (D+ and D-) protected against
15 kV ESD
■ Breakdown Voltage VBR = 6.0 V min
■ Flip-Chip 400 µm pitch, lead-free
■ Very low leakage current
■ Very small PCB area
■ RoHS compliant
Flip-Chip
(4 Bumps)
Pin configuration (bump side)
AB
1
2
Description
www.DataSheet4U.com
The USBULC6-2F3 is a monolithic, application
specific discrete device dedicated to ESD
protection of high speed interfaces.
Its ultra low line capacitance secures a high level
of signal integrity without compromizing the
protection of downstream sensitive chips against
the most stringently characterized ESD strikes.
Configuration
A1
B1
Benefits
■ Minimized impact on rise and fall times for
maximum data integrity
■ Low PCB space occupation
■ Higher reliability offered by monolithic
integration
Complies with the following standards:
IEC 61000-4-2: 15 kV (air discharge)
8 kV (contact discharge)
MIL STD 883G - Method 3015.7
25 kV (Human body model)
A2 B2
Note: B1 and B2 bumps must be
grounded on the PCB together
Order code
Part Number
USBULC6-2F3
Marking
EH
TM: IPAD is a trademark of STMicroelectronics
December 2006
Rev 1
1/8
www.st.com
1 Page USBULC6-2F3
Characteristics
Figure 2.
Eye diagram, board only (according Figure 3.
to USB High Speed)
Eye diagram, board with
USBULC6-2F3 (according to
USB 2.0 High Speed)
Board
480 Mb/s
USBULC6-2F3
480 Mb/s
Horiz: 350 ps/div
Ver: 200 mV/div
Horiz: 350 ps/div
Ver: 200 mV/div
Figure 4. ESD response to IEC 61000-4-2
(+15 kV air discharge)
Figure 5. ESD response to IEC 61000-4-2
(-15 kV air discharge
X: 50 ns/division
Y: 20 V/division
1 Gs/s
X: 50 ns/division
Y: 20 V/division
1 Gs/s
Figure 6. Junction capacitance versus
frequency (typical values)
C(pF)
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.E+07
VOSC=30 mVRMS
Tj=25 °C
1.E+08
F(Hz)
1.E+09
Figure 7. Analog crosstalk measurements
dB
0.00
USBULC6 -2F3
-30.00
-60.00
-90.00
-120.00
100.0k
1.0M
F (Hz)
10.0M
100.0M
1.0G
3/8
3Pages Package information
3 Package information
Figure 14. Flip-Chip dimensions
400 µm ± 40
USBULC6-2F3
605 µm ± 55
0.92 mm ± 30 µm 255 µm ± 40
Figure 15. Foot print recommendations Figure 16. Marking
Copper pad Diameter:
220µm recommended
260µm maximum
Solder mask opening:
300µm minimum
Solder stencil opening :
220µm recommended
Dot
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
xxz
y ww
6/8
6 Page | |||
ページ | 合計 : 8 ページ | ||
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PDF ダウンロード | [ USBULC6-2F3 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
USBULC6-2F3 | Dual ultra low capacitance protection | ST Microelectronics |