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PDF MC74LCX16543A Data sheet ( Hoja de datos )
| Número de pieza | MC74LCX16543A | |
| Descripción | LOW-VOLTAGE CMOS 16-BIT LATCHING TRANSCEIVER | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage CMOS 16-Bit
Latching Transceiver
With 5V-Tolerant Inputs and Outputs
(3-State, Non-Inverting)
MC74LCX16543A
The MC74LCX16543A is a high performance, non–inverting 16–bit
latching transceiver operating from a 2.7 to 3.6V supply. The device is
byte controlled. Each byte has separate control inputs which can be tied
together for full 16–bit operation. High impedance TTL compatible inputs
significantly reduce current loading to input drivers while TTL compatible
outputs offer improved switching noise performance. A VI specification of
5.5V allows MC74LCX16543A inputs to be safely driven from 5V devices.
The MC74LCX16543A is suitable for memory address driving and all TTL
level bus oriented transceiver applications.
For data flow from A to B with the EAB LOW, the A–to–B Output
Enable (OEAB) must be LOW in order to enable data to the B bus, as
indicated in the Function Table. With EAB LOW, a LOW signal on the
A–to–B Latch Enable (LEAB) input makes the A–to–B latches
transparent; a subsequent LOW–to–HIGH transition of the LEAB signal
will latch the A latches, and the outputs no longer change with the A
inputs. With EAB and OEAB both LOW, the 3–State B output buffers are
active and reflect the data present at the output of the A latches. Control
of data flow from B to A is symmetric to that above, but uses the EBA,
LEBA, and OEBA inputs.
www.DataSheet4U.com
LOW–VOLTAGE CMOS
16–BIT LATCHING
TRANSCEIVER
DT SUFFIX
56–LEAD PLASTIC TSSOP PACKAGE
CASE 1202–01
• Designed for 2.7 to 3.6V VCC Operation
• 5.2ns Maximum tpd
• 5V Tolerant — Interface Capability With 5V TTL Logic
• Supports Live Insertion and Withdrawal
• IOFF Specification Guarantees High Impedance When VCC = 0V
• LVTTL Compatible
• LVCMOS Compatible
• 24mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (20µA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500mA
• ESD Performance: Human Body Model >2000V; Machine Model >200V
PIN NAMES
Pins
Function
OExxn
Exxn
LExxn
A0–A15
B0–B15
Output Enable Inputs
Enable Inputs
Latch Enable Inputs
3–State Inputs/Outputs
3–State Inputs/Outputs
1/97
© Motorola, Inc. 1997
1
REV 0
1 page  
MC74LCX16543A
AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω)
Limits
TA = –40°C to +85°C
Symbol
Parameter
Waveform
VCC = 3.0V to 3.6V
Min Max
VCC = 2.7V
Min Max
Unit
tPLH
tPHL
Propagation Delay
An to Bn or Bn to An
1 1.5 5.4 1.5 6.0 ns
1.5 5.4 1.5 6.0
tPLH
tPHL
Propagation Delay
LEBAn to An or LEABn to Bn
4 1.5 7.0 1.5 8.2 ns
1.5 7.0 1.5 8.2
tPZH
tPZL
Output Enable Time
OEBAn to An or OEABn to Bn
2 1.5 6.5 1.5 7.0 ns
1.5 6.5 1.5 7.0
tPHZ
tPLZ
Output Disable Time
OEBAn to An or OEABn to Bn
2 1.5 6.5 1.5 7.0 ns
1.5 6.5 1.5 7.0
tPZH
tPZL
Output Enable Time
EBAn to An or EABn to Bn
2 1.5 6.5 1.5 7.0 ns
1.5 6.5 1.5 7.0
tPHZ
tPLZ
Output Disable Time
EBAn to An or EABn to Bn
2 1.5 6.5 1.5 7.0 ns
1.5 6.5 1.5 7.0
ts Setup Time, HIGH to LOW Data to LExxn
4 2.5
2.5 ns
th Hold Time, HIGH to LOW Data to LExxn
4 1.5
1.5 ns
ts Setup Time, HIGH to LOW Data to Exxn
4 2.5
2.5 ns
th Hold Time, HIGH to LOW Data to Exxn
4 1.5
1.5 ns
tw Latch Enable or Enable Pulse Width, LOW
4 3.0
3.0 ns
tOSHL
tOSLH
Output–to–Output Skew
(Note 3.)
1.0 ns
1.0
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
Symbol
Characteristic
Condition
TA = +25°C
Min Typ Max
Unit
VOLP Dynamic LOW Peak Voltage (Note 4.)
VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V
0.8
V
VOLV Dynamic LOW Valley Voltage (Note 4.) VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V
0.8
V
4. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
CIN
CI/O
CPD
Input Capacitance
Input/Output Capacitance
Power Dissipation Capacitance
Condition
VCC = 3.3V, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC
10MHz, VCC = 3.3V, VI = 0V or VCC
Typical
7
8
20
Unit
pF
pF
pF
LCX DATA
BR1339 — REV 3
5
MOTOROLA
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| PDF Descargar | [ Datasheet MC74LCX16543A.PDF ] | |
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