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PDF HT46R342 Data sheet ( Hoja de datos )

Número de pieza HT46R342
Descripción (HT46R322 / HT46R342) A/D
Fabricantes Holtek Semiconductor 
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HT46R322/HT46R342
A/D with OPA Type 8-Bit OTP MCU
Technical Document
· Tools Information
· FAQs
· Application Note
- HA0003E Communicating between the HT48 & HT46 Series MCUs and the HT93LC46 EEPROM
- HA0049E Read and Write Control of the HT1380
- HA0051E Li Battery Charger Demo Board - Using the HT46R47
- HA0052E Microcontroller Application - Battery Charger
- HA0083E Li Battery Charger Demo Board - Using the HT46R46
Features
· Operating voltage:
fSYS=4MHz: 2.2V~5.5V
fSYS=8MHz: 3.3V~5.5V
· 36 bidirectional I/O lines (max.), including 16 LED
driver with twice sink/source current
· Single interrupt input shared with an I/O line
· 8-bit programmable timer/event counter with overflow
interrupt and 7-stage prescaler
· Integrated crystal and RC oscillator
· Watchdog Timer
· 2048´14 Program Memory capacity - HT46R322
4096´15 Program Memory capacity - HT46R342
· 88´8 Data Memory capacity - HT46R322
192´8 Data Memory capacity - HT46R342
· Integrated PFD function for sound generation
· Power-down and wake-up functions reduce power
consumption
· Up to 0.5ms instruction cycle with 8MHz system clock
at VDD=5V
· 6-level subroutine nesting
· 4 channel 12-bit resolution A/D converter
· Integrated single operational amplifier or comparator
selectable via configuration option
· Dual 8-bit PWM outputs shared with I/O lines
· Bit manipulation instruction
· Full table read instruction
· 63 powerful instructions
· All instructions executed in one or two machine
cycles
· Low voltage reset function
· 44-pin QFP package
General Description
The HT46R322 and HT46R342 are 8-bit, high perfor-
mance, RISC architecture microcontroller devices. With
their fully integrated A/D converter they are especially
suitable for applications which interface to analog sig-
nals, such as those from sensors. The addition of an in-
ternal operational amplifier/comparator and PWM
modulation functions further adds to the analog capabil-
ity of these devices.
With the comprehensive features of low power con-
sumption, I/O flexibility, programmable frequency di-
vider, timer functions, oscillator options, multi-channel
A/D Converter OP/Comparator, Pulse Width Modula-
tion function, Power-down and wake-up functions etc,
the application scope of these devices is broad and en-
compasses areas such as sensor signal processing,
motor driving, industrial control, consumer products,
subsystem controllers, etc.
The HT46R342 is under development and will be avail-
able soon.
Rev. 1.00
1 December 21, 2006

1 page




HT46R342 pdf
www.DataSheet4U.com
HT46R322/HT46R342
Symbol
Parameter
IADC
Additional Power Consumption
if A/D Converter is Used
DNL
ADC Differential Non-Linearity
INL ADC Integral Non-Linearity
RESOLU Resolution
Test Conditions
VDD Conditions
3V
¾
5V
5V tAD=1ms
5V tAD=1ms
¾¾
Min. Typ. Max. Unit
¾ 0.5 1 mA
¾ 1.5 3 mA
¾ ¾ ±2 mA
¾ ±2.5 4
mA
¾ ¾ 12 Bits
A.C. Characteristics
Symbol
Parameter
fSYS
fTIMER
System Clock
(Crystal OSC, RC OSC)
Timer I/P Frequency
(TMR)
tWDTOSC Watchdog Oscillator Period
tWDT1
tWDT2
tRES
tSST
tLVR
tINT
tAD
tADC
tADCS
Watchdog Time-out Period
(WDT OSC)
Watchdog Time-out Period
(System Clock)
External Reset Low Pulse Width
System Start-up Timer Period
Low Voltage Width to Reset
Interrupt Pulse Width
A/D Clock Period
A/D Conversion Time
A/D Sampling Time
Test Conditions
VDD Conditions
¾ 2.2V~5.5V
¾ 3.3V~5.5V
¾ 2.2V~5.5V
¾ 3.3V~5.5V
3V ¾
5V ¾
¾¾
¾¾
¾¾
¾ Wake-up from HALT
¾¾
¾¾
¾¾
¾¾
¾¾
Min.
400
400
0
0
45
32
215
217
1
¾
0.25
1
1
¾
¾
Note: *tSYS=1/fSYS
Typ.
¾
¾
¾
¾
90
65
¾
¾
¾
1024
1
¾
¾
80
32
Ta=25°C
Max. Unit
4000
8000
4000
8000
180
130
kHz
kHz
kHz
kHz
ms
ms
216 tWDTOSC
218 tSYS
¾ ms
¾ *tSYS
2 ms
¾ ms
¾ ms
¾ tAD
¾ tAD
Rev. 1.00
5 December 21, 2006

5 Page





HT46R342 arduino
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HT46R322/HT46R342
Once an interrupt subroutine is serviced, all the other in-
terrupts will be blocked by clearing the EMI bit. This
scheme may prevent any further interrupt nesting. Other
interrupt requests may happen during this interval but
only the interrupt request flag is recorded. If a certain in-
terrupt requires servicing within the service routine, the
EMI bit and the corresponding bit in INTC may be set to
allow interrupt nesting. If the stack is full, the interrupt re-
quest will not be acknowledged, even if the related inter-
rupt is enabled, until the stack pointer is decremented. If
immediate service is desired, the stack must be pre-
vented from becoming full.
All interrupts have a wake-up capability. As an interrupt
is serviced, a control transfer occurs by pushing the pro-
gram counter onto the stack, followed by a branch to a
subroutine at a specified location in the program mem-
ory. Only the program counter is pushed onto the stack.
If the contents of the register or status register are al-
tered by the interrupt service program which corrupts
the desired control sequence, the contents should be
saved in advance.
External interrupts are triggered by a high to low transi-
tion on the INT pin, which will set the related interrupt re-
quest flag, EIF, which is bit 4 of INTC. When the interrupt
is enabled, the stack is not full and the external interrupt
is active, a subroutine call to location 04H will occur. The
interrupt request flag, EIF, and EMI bits will be cleared to
disable other interrupts.
The internal timer/event counter interrupt is initialised by
setting the timer/event counter interrupt request flag, TF,
which is bit 5 of INTC, caused by a timer overflow. When
the interrupt is enabled, the stack is not full and the TF
bit is set, a subroutine call to location 08H will occur. The
related interrupt request flag, TF, will be reset and the
EMI bit cleared to disable further interrupts.
The A/D converter interrupt is initialised by setting the
A/D converter request flag, ADF, which is bit 6 of INTC,
caused by an end of A/D conversion. When the interrupt
is enabled, the stack is not full and the ADF bit is set, a
subroutine call to location 0CH will occur. The related in-
terrupt request flag, ADF, will be reset and the EMI bit
cleared to disable further interrupts.
During the execution of an interrupt subroutine, other in-
terrupt acknowledgments are held until the RETI in-
struction is executed or the EMI bit and the related
interrupt control bit are set to 1. Of course, the stack
must not be full. To return from the interrupt subroutine,
a RET or RETI instruction may be executed. A RETI in-
struction will set the EMI bit to enable an interrupt ser-
vice, but a RET instruction will not.
Interrupts, occurring in the interval between the rising
edges of two consecutive T2 pulses, will be serviced on
the latter of the two T2 pulses, if the corresponding inter-
rupts are enabled. In the case of simultaneous requests
the following table shows the priority that is applied.
These can be masked by resetting the EMI bit.
Interrupt Source
Priority
External Interrupt
1
Timer/Event Counter Overflow
2
A/D Converter Interrupt
3
Vector
004H
008H
00CH
Once the interrupt request flags, TF, EIF, ADF, are set,
they will remain in the INTC register until the interrupts
are serviced or cleared by a software instruction.
It is recommended that a program does not use the CALL
subroutine within the interrupt subroutine. Interrupts of-
ten occur in an unpredictable manner or need to be ser-
viced immediately in some applications. If only one stack
is left and enabling the interrupt is not well controlled, the
original control sequence will be damaged once the
²CALL² operates in the interrupt subroutine.
Oscillator Configuration
There are two oscillator circuits in the microcontroller,
namely an RC oscillator and a crystal oscillator, the
choice of which is determined by a configuration option.
When the system enters the Power-down mode the sys-
tem oscillator stops and ignores external signals to con-
serve power.
If an RC oscillator is used, an external resistor between
OSC1 and VSS is required whose resistance value
must range from 24kW to 1MW. The system clock, di-
vided by 4, can be monitored on pin OSC2 if a pull-high
resistor is connected. This signal can be used to syn-
chronise external logic. The RC oscillator provides the
most cost effective solution, however the frequency of
oscillation may vary with VDD, temperature and the
process variations. It is, therefore, not suitable for tim-
ing sensitive operations where an accurate oscillator
frequency is desired.
If the Crystal oscillator is used, a crystal across OSC1
and OSC2 is needed to provide the feedback and phase
shift required for the oscillator; no other external compo-
nents are required. Instead of a crystal, a resonator can
also be connected between OSC1 and OSC2 to get a
frequency reference, but two external capacitors in
OSC1 and OSC2 are required, If the oscillating fre-
quency is less than 1MHz.
The WDT oscillator is a free running on-chip RC oscilla-
tor, and requires no external components. Even if the
system enters the power down mode, the system clock
O SC1
V DD
470pF
O SC1
O SC2
fS Y S /4
O SC2
C r y s ta l O s c illa to r
R C O s c illa to r
System Oscillator
Rev. 1.00
11 December 21, 2006

11 Page







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