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PDF MT28F322P3 Data sheet ( Hoja de datos )
| Número de pieza | MT28F322P3 | |
| Descripción | FLASH MEMORY | |
| Fabricantes | Micron Technology | |
| Logotipo |  |
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FLASH MEMORY
PRELIMINARY‡
2 MEG x 16
ASYNC/PAGE FLASH MEMORY
MT28F322P3
Low Voltage, Extended Temperature
FEATURES
• Flexible dual-bank architecture
Support for true concurrent operation with zero
latency
Read bank a during program bank b and vice
versa
Read bank a during erase bank b and vice versa
• Basic configuration:
Seventy-one erasable blocks
Bank a (8Mb for data storage)
Bank b (24Mb for program storage)
• VCC, VCCQ, VPP voltages
2.7V (MIN), 3.3V (MAX) VCC
2.2V (MIN), 3.3V (MAX) VCCQ
3.0V (TYP) VPP (in-system PROGRAM/ERASE)
12V ±5% (HV) VPP tolerant (factory programming
compatibility)
• Random access time: 70ns @ 2.7V VCC
• Page Mode read access
Eight-word page
Interpage read access: 70ns @ 2.7V
Intrapage read access: 30ns @ 2.7V
• Low power consumption (VCC = 3.3V)
Asynchronous/interpage READ < 15mA
Intrapage READ < 7mA
WRITE < 20mA (MAX)
ERASE < 25mA (MAX)
Standby < 15µA (TYP), 50µA (MAX) @ 3.3V
Automatic power save (APS) feature
• Enhanced write and erase suspend options
ERASE-SUSPEND-to-READ within same bank
PROGRAM-SUSPEND-to-READ within same bank
ERASE-SUSPEND-to-PROGRAM within same bank
• Dual 64-bit chip protection registers for security
purposes
• Cross-compatible command support
Extended command set
Common flash interface
• PROGRAM/ERASE cycle
100,000 WRITE/ERASE cycles per block
• Fast programming algorithm
VPP = 12V ±5%
BALL ASSIGNMENT
48-Ball FBGA
12
A A13 A11
3
A8
456
VPP WP# A19
7
A7
8
A4
B A14 A10 WE# RST# A18 A17
A5
A2
C A15 A12 A9 NC A20 A6 A3 A1
D A16 DQ14 DQ5 DQ11 DQ2 DQ8 CE#
A0
E VCCQ DQ15 DQ6 DQ12 DQ3 DQ9 DQ0
VSS
F VSS
DQ7 DQ13 DQ4
VCC DQ10 DQ1 OE#
Top View
(Ball Down)
NOTE: See page 7 for Ball Description Table.
See page 35 for mechanical drawing.
OPTIONS
MARKING
• Timing
70ns access
80ns access
• Boot Block Configuration
Top
Bottom
• Package
48-ball FBGA (6 x 8 ball grid)
• Operating Temperature Range
Commercial (0ºC to +70ºC)
Extended (-40ºC to +85ºC)
-70
-80
T
B
FJ
None
ET
Part Number Example:
MT28F322P3FJ-70 BET
2 Meg x 16 Async/Page Flash Memory
MT28F322P3FJ_3.p65 – Rev. 3, Pub. 7/02
1
©2002, Micron Technology, Inc.
‡PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE
SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S
PRODUCTION DATA SHEET SPECIFICATIONS.
1 page  
Block
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48
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35
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32
31
30
29
28
27
26
25
24
23
PRELIMINARY
2 MEG x 16
ASYNC/PAGE FLASH MEMORY
Figure 2
Bottom Boot Block Device
Bank b = 24Mb
Block Size
(K-bytes/K-words)
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
Address Range
(x16)
1F8000h-1FFFFFh
1F0000h-1F7FFFh
1E8000h-1EFFFFh
1E0000h-1E7FFFh
1D8000h-1DFFFFh
1D0000h-1D7FFFh
1C8000h-1CFFFFh
1C0000h-1C7FFFh
1B8000h-1BFFFFh
1B0000h-1B7FFFh
1A8000h-1AFFFFh
1A0000h-1A7FFFh
198000h-19FFFFh
190000h-197FFFh
188000h-18FFFFh
180000h-187FFFh
178000h-17FFFFh
170000h-177FFFh
168000h-16FFFFh
160000h-167FFFh
158000h-15FFFFh
150000h-157FFFh
148000h-14FFFFh
140000h-147FFFh
138000h-13FFFFh
130000h-137FFFh
128000h-12FFFFh
120000h-127FFFh
118000h-11FFFFh
110000h-117FFFh
108000h-10FFFFh
100000h-107FFFh
0F8000h-0FFFFFh
0F0000h-0F7FFFh
0E8000h-0EFFFFh
0E0000h-0E7FFFh
0D8000h-0DFFFFh
0D0000h-0D7FFFh
0C8000h-0CFFFFh
0C0000h-0C7FFFh
0B8000h-0BFFFFh
0B0000h-0B7FFFh
0A8000h-0AFFFFh
0A0000h-0A7FFFh
098000h-097FFFh
090000h-097FFFh
088000h-087FFFh
080000h-087FFFh
Block
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bank a = 8Mb
Block Size
(K-bytes/K-words)
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
8/4
8/4
8/4
8/4
8/4
8/4
8/4
8/4
Address Range
(x16)
078000h-07FFFFh
070000h-077FFFh
068000h-067FFFh
060000h-067FFFh
058000h-05FFFFh
050000h-057FFFh
048000h-04FFFFh
040000h-047FFFh
038000h-03FFFFh
030000h-037FFFh
028000h-02FFFFh
020000h-027FFFh
018000h-01FFFFh
010000h-017FFFh
008000h-00FFFFh
007000h-007FFFh
006000h-006FFFh
005000h-005FFFh
004000h-004FFFh
003000h-003FFFh
002000h-002FFFh
001000h-001FFFh
000000h-000FFFh
2 Meg x 16 Async/Page Flash Memory
MT28F322P3FJ_3.p65 – Rev. 3, Pub. 7/02
5 Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
5 Page 
PRELIMINARY
2 MEG x 16
ASYNC/PAGE FLASH MEMORY
Table 5
Command Descriptions (continued)
CODE DEVICE MODE
D0h Erase Confirm
Program/Erase
Resume
D0h FPA Confirm
FFh Read Array
01h Lock Block
2Fh Lock Down
D0h Unlock Block
00h Invalid /Reserved
BUS CYCLE
DESCRIPTION
Second
If the previous command was an ERASE SETUP command, then the
CSM will close the address and data latches, and it will begin erasing
the block indicated on the address balls. During programming/erase,
the device will respond only to the READ STATUS REGISTER,
PROGRAM SUSPEND, or ERASE SUSPEND commands and will output
status register data on the falling edge of OE# or CE#, whichever
occurs last.
First
If a PROGRAM or ERASE operation was previously suspended, this
command will resume the operation.
Second If the previous command was FPA SETUP, the CSM will latch the
address indicated on the address bus and enter the FPA mode.
First
During the array mode, array data will be output on the data bus.
Second
If the previous command was PROTECTION CONFIGURATION SETUP,
the CSM will latch the address and lock the block indicated on the
address bus.
Second
If the previous command was PROTECTION CONFIGURATION SETUP,
the CSM will latch the address and lock down the block indicated on
the address bus.
Second
If the previous command was PROTECTION CONFIGURATION SETUP,
the CSM will latch the address and unlock the block indicated on the
address bus. If the block had been previously set to lock down, this
operation will have no effect.
Unassigned command that should not be used.
logic HIGH level and the CSM responds to the full com-
mand set. The CSM stays in the current command state
until the microprocessor issues another command.
The WSM successfully initiates an ERASE or PRO-
GRAM operation only when VPP is within its correct volt-
age range.
CLEAR STATUS REGISTER
The internal circuitry can set, but not clear, the block
lock status bit (SR1), the VPP status bit (SR3), the pro-
gram status bit (SR4), and the erase status bit (SR5) of
the status register. The CLEAR STATUS REGISTER com-
mand (50h) allows the external microprocessor to clear
these status bits and synchronize to the internal op-
erations. When the status bits are cleared, the device
returns to the read array mode.
READ OPERATIONS
The following READ operations are available: READ
ARRAY, READ PROTECTION CONFIGURATION REG-
ISTER, READ QUERY and READ STATUS REGISTER.
READ ARRAY
The array is read by entering the command code
FFh on DQ0–DQ7. Control signals CE# and OE# must
be at a logic LOW level (VIL), and WE# and RST# must be
at logic HIGH level (VIH) to read data from the array.
Data is available on DQ0–DQ15. Any valid address
within any of the blocks selects that address and allows
data to be read from that address. Upon initial power-
up or device reset, the device defaults to the read array
mode.
READ PROTECTION CONFIGURATION DATA
The chip identification mode outputs three types
of information: the manufacturer/device identifier, the
block locking status, and the protection register. Two
bus cycles are required for this operation: the chip iden-
tification data is read by entering the command code
90h on DQ0–DQ7 to the bank containing address 0h
and the identification code address on the address
lines. Control signals CE# and OE# must be at a logic
LOW level (VIL), and WE# and RST# must be at a logic
HIGH level (VIH) to read data from the protection con-
2 Meg x 16 Async/Page Flash Memory
MT28F322P3FJ_3.p65 – Rev. 3, Pub. 7/02
11
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MT28F322P3.PDF ] | |
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