PDF IXP42X Data sheet ( Hoja de datos )

Número de pieza	IXP42X
Descripción	IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Fabricantes	Intel Corporation
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No Preview Available ! www.DataSheet4U.com Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Product Features Datasheet For a complete list of product features, see “Product Features” on page 11. The following features do not require enabling software: ■ Intel XScale® Core — Up to 533 MHz ■ PCI Interface ■ USB v1.1 Device Controller ■ SDRAM Interface ■ High-Speed UART ■ Console UART ■ Internal Bus Performance Monitoring Unit ■ 16 GPIOs ■ Four Internal Timers ■ Packaging — 492-pin PBGA ■ Commercial/Extended Temperature The following features do require enabling software: ■ Encryption/Authentication (AES,DES,3DES,SHA-1,MD5) ■ Two High-Speed, Serial Interfaces ■ Three Network Processor Engines ■ Up to two MII Interfaces ■ One UTOPIA-2 Interface ■ Multi-Channel HDLC Note: Refer to the Intel® IXP400 Software Programmer’s Guide for information on which features are currently enabled. Typical Applications ■ High-Performance DSL Modem ■ High-Performance Cable Modem ■ Residential Gateway ■ SME Router ■ Network Printers ■ Control Plane ■ Integrated Access Device (IAD) ■ Set-Top Box ■ Access Points (802.11a/b/g) ■ Industrial Controllers Document Number: 252479, Revision: 005 March 2005 1 page Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Figures 1 Intel® IXP425 Network Processor Block Diagram ...................................................................... 15 2 Intel® IXP423 Network Processor Block Diagram ...................................................................... 16 3 Intel® IXP422 Network Processor Block Diagram ...................................................................... 17 4 Intel® IXP421 Network Processor Block Diagram ...................................................................... 18 5 Intel® IXP420 Network Processor Block Diagram ...................................................................... 19 6 Intel XScale® Core Block Diagram ............................................................................................. 27 7 492-Pin Lead PBGA Package .................................................................................................... 50 8 Package Markings ...................................................................................................................... 51 9 VCCPLL1 Power Filtering Diagram ............................................................................................... 83 10 VCCPLL2 Power Filtering Diagram ............................................................................................... 83 11 VCCOSCP Power Filtering Diagram ............................................................................................. 84 12 VCCOSC Power Filtering Diagram ............................................................................................... 84 13 RCOMP Pin External Resistor Requirements ............................................................................ 85 14 Typical Connection to a Crystal .................................................................................................. 93 15 Typical Connection to an Oscillator ............................................................................................ 93 16 PCI Output Timing ...................................................................................................................... 95 17 PCI Input Timing ......................................................................................................................... 95 18 UTOPIA-2 Input Timings............................................................................................................. 97 19 UTOPIA-2 Output Timings.......................................................................................................... 97 20 MII Output Timings ..................................................................................................................... 98 21 MII Input Timings ........................................................................................................................ 98 22 MDIO Output Timings ................................................................................................................. 99 23 MDIO Input Timings.................................................................................................................... 99 24 SDRAM Input Timings ..............................................................................................................100 25 SDRAM Output Timings ...........................................................................................................100 26 Signal Timing With Respect to Clock Rising Edge ...................................................................101 27 Intel® Multiplexed Read Mode ..................................................................................................102 28 Intel® Multiplexed Write Mode ..................................................................................................103 29 Intel® Simplex Read Mode........................................................................................................105 30 Intel® Simplex Write Mode........................................................................................................105 31 Motorola* Multiplexed Read Mode............................................................................................107 32 Motorola* Multiplexed Write Mode............................................................................................108 33 Motorola* Simplex Read Mode .................................................................................................110 34 Motorola* Simplex Write Mode .................................................................................................111 35 HPI-8 Mode Read Accesses.....................................................................................................113 36 HPI-8 Mode Write Accesses.....................................................................................................114 37 HPI-16 Multiplexed Write Mode ................................................................................................118 38 HPI-16 Multiplex Read Mode....................................................................................................120 39 HPI-16 Simplex Read Mode .....................................................................................................122 40 HPI-16 Simplex Write Mode .....................................................................................................124 41 High-Speed, Serial Timings ......................................................................................................125 42 Boundary-Scan General Timings..............................................................................................127 43 Boundary-Scan Reset Timings .................................................................................................127 44 Reset Timings...........................................................................................................................128 45 Power-Up Sequence Timing.....................................................................................................130 Datasheet Document Number: 252479, Revision: 005 March 2005 5 5 Page Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 1.2 Product Features 1.2.1 Product Line Features Table 3 on page 14 describes which features apply to the Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor. • Intel XScale® Core (compliant with ARM* architecture) — High-performance processor based on Intel XScale® Microarchitecture — Seven/eight-stage Intel® Super-Pipelined RISC Technology — Management unit • 32-entry, data memory management unit • 32-entry, instruction memory management unit • 32-Kbyte, 32-way, set associative instruction cache • 32-Kbyte, 32-way, set associative data cache • 2-Kbyte, two-way, set associative mini-data cache • 128-entry, branch target buffer • Eight-entry write buffer • Four-entry fill and pend buffers — Clock speeds: • 266 MHz • 400 MHz • 533 MHz — ARM* Version V5TE Compliant — Intel® Media Processing Technology Multiply-accumulate coprocessor — Debug unit Accessible through JTAG port • PCI interface — 32-bit interface — Selectable clock • 33 MHz clock output derived from either GPIO14 or GPIO15 • 33 and 66 MHz clock input — PCI Local Bus Specification, Rev. 2.2 compatible — PCI arbiter supporting up to four external PCI devices (four REQ/GNT pairs) — Host/option capable — Master/target capable — Two DMA channels • USB v 1.1 device controller — Full-speed capable — Embedded transceiver Datasheet Document Number: 252479, Revision: 005 March 2005 11 11 Page

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