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PDF IRMCK201 Data sheet ( Hoja de datos )
| Número de pieza | IRMCK201 | |
| Descripción | High Performance Configurable Digital AC Servo Control IC | |
| Fabricantes | International Rectifier | |
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Data Sheet No. PD60224 Rev.B
IRMCK201
High Performance Configurable Digital AC
Servo Control IC
Features
Product Summary
• Complete closed loop current control
Max. Clock Input (Sysclk)
(Synchronously Rotating Frame Field Orientation)
• Versatile Space Vector PWM
Max. PLL clock for current feedback
33.3 MHz
133.3 MHz
• Direct interface to IR2175 current sensing high
voltage IC
• Direct Encoder interface with multiplexed/non-
Closed loop current control computation time 6 µsec max
Closed loop current loop bandwidth (-3 dB)
5.5 kHz
multiplexed Hall A/B/C signals
• Direct interface to IR213x 3-phase gate driver IC
• Closed loop velocity control
Closed loop velocity loop update rate
PWM carrier frequency
5 / 10 kHz
83.3 kHz max
• Configurable architecture
PWM counter resolution
12 bit
o Supports AC PM motor or Induction motor
o Closed loop or open loop control
Current feedback temp drift/offset
calibrated
• Asynchronous serial communication interface
Max SPI clock
8 MHz
(RS232C, RS422)
• Fast SPI interface
Package: QFP100
• 4 channel 12-bit A/D interface with simultaneous
sample/hold
• 8-bit parallel bus interface for microcontroller
expansion (supports most 8-bit microprocessors)
• Integrated brake IGBT control
• ServoDesignerTM (Configuration Tool) available
Description
IRMCK201 is a complete AC servo motor control IC. It contains closed loop current control for sinusoidal AC current, and
closed loop velocity control based on encoder position feedback interface. A standard communication port is provided for
RS232C or RS422, in addition to a fast SPI communication interface. Unlike a traditional DSP or a microcontroller, the
IRMCK201 does not require any programming effort to complete the complex control algorithm. It allows users to configure
the algorithm for specific application needs. Permanent magnet motor or AC induction motor are supported. IRMCK201
facilitates high performance servo design together with the IR2175 current sensing IC and IR213x high voltage 3-phase gate
driver IC, which simplifies the hardware design while minimizing cost. For multi-axis applications, IRMCK201 can be used
as a multi-drop slave drive based on the SPI protocol. The package is available in a 100-pin QFP.
1 page  
IRMCK201
Host Parallel Read Cycle......................................................................................................................................... 26
Host Parallel Write Cycle........................................................................................................................................ 27
Discrete I/O Electrical Characteristics ........................................................................................................................ 28
Motion Peripheral Electrical Characteristics............................................................................................................... 29
PWM Electrical Characteristics .............................................................................................................................. 29
IR2175 Interface ..................................................................................................................................................... 29
Encoder Electrical Characteristics........................................................................................................................... 30
Analog To Digital Interface Electrical Characteristics ............................................................................................... 31
ADC Timing............................................................................................................................................................ 31
PLL Interface Electrical Characteristics...................................................................................................................... 33
Appendix A Host Register Map ............................................................................................................................... 34
Host Parallel Access................................................................................................................................................ 34
SPI Register Access ................................................................................................................................................ 34
RS-232 Register Access.......................................................................................................................................... 34
Write Register Definitions .......................................................................................................................................... 40
QuadratureDecode Register Group (Write Registers)............................................................................................. 40
PwmConfig Register Group (Write Registers) ....................................................................................................... 41
CurrentFeedbackConfig Register Group (Write Registers) .................................................................................... 42
SystemControl Register Group (Write Registers)................................................................................................... 43
CurrentLoopConfig Register Group (Write Registers) ........................................................................................... 44
VelocityControl Register Group (Write Registers)................................................................................................. 45
FaultControl Register Group (Write Registers) ...................................................................................................... 47
SVPWMScaler Register Group (Write Registers) .................................................................................................. 47
DiagnosticPwmControl Register Group (Write Registers) ..................................................................................... 48
SystemConfig Register Group (Write Registers).................................................................................................... 49
DirectHostVoltageControl Register Group (Write Registers) ................................................................................ 49
32bitQuadDecode Register Group (Write Registers).............................................................................................. 50
EepromControl Registers (Write Registers)............................................................................................................ 51
HallSensorEncoderInit (Write Registers – EEPROM only) ................................................................................... 52
Read Register Definitions ........................................................................................................................................... 53
QuadratureDecodeStatus Register Group (Read Registers).................................................................................... 53
SystemStatus Register Group (Read Registers) ...................................................................................................... 53
DcBusVoltage Register Group (Read Registers) .................................................................................................... 54
FocDiagnosticData Register Group (Read Registers)............................................................................................. 54
FaultStatus Register Group (Read Registers).......................................................................................................... 56
VelocityStatus Register Group (Read Registers) .................................................................................................... 56
CurrentFeedbackOffset Register Group (Read Registers) ...................................................................................... 57
32bitQuadDecodeStatus Register Group (Read Registers)..................................................................................... 57
EepromStatus Registers (Read Registers)............................................................................................................... 58
FOCDiagnosticDataSupplement Register Group (Read Registers) ........................................................................ 59
Appendix B Package ................................................................................................................................................. 60
Appendix C Errata.................................................................................................................................................... 62
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
5
5 Page 
Signal
PWMUH
PWMUL
PWMVH
PWHVL
PWMWH
PWMWL
BRAKE
GATEKILL
IFB0
IFB1
ENA
ENB
ENZ
HALLA
HALLB
HALLC
Signal
ADCLK
ADOUT
DAC [3:0]
ADCONVST
ADMUX0
ADMUX1
IRMCK201
Motion Peripheral Group
Input (I) /
Output (O)
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
Low (L) /
High (H) True
Asserted
Varies, Based on
Write Register
0x0D
L
Varies, Based on
Write Register
0x0C Bit 7
-
-
-
-
-
-
-
-
Function
PWM phase U high side
PWM phase U low side
PWM phase V high side
PWM phase V low side
PWM phase W high side
PWM phase W low side
IGBT gate
When asserted, negates all six
PWM signals, host writeable
Channel 0 (phase V)
Channel 1 (phase W)
Encoder A
Encoder B
Encoder Z
Hall A
Hall B
Hall C
Analog Interface Group
Input (I) /
Output (O)
O
I
O
O
O
O
Low (L) /
High (H) True
Asserted
Negative Edge
Sensitive
-
-
L
H
H
Function
Clock to ADS7818
Serial data from ADS7818
Diagnostic DAC
Conversion start to ADS7818
Analog input mux select
Analog input mux select
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
11
11 Page | ||
| Páginas | Total 62 Páginas | |
| PDF Descargar | [ Datasheet IRMCK201.PDF ] | |
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