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PDF IRFG5110 Data sheet ( Hoja de datos )

Número de pieza IRFG5110
Descripción Combination 2N-2P-CHANNEL
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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PD - 90437D
IRFG5110
POWER MOSFET
100V, Combination 2N-2P-CHANNEL
THRU-HOLE (MO-036AB)
HEXFET® MOSFETTECHNOLOGY
Product Summary
Part Number RDS(on)
IRFG5110
0.7
IRFG5110
0.7
ID
1.0A
-1.0A
CHANNEL
N
P
HEXFET® MOSFET technology is the key to International
Rectifier’s advanced line of power MOSFET transistors. The
efficient geometry design achieves very low on-state resis-
tance combined with high transconductance. HEXFET tran-
sistors also feature all of the well-established advantages
of MOSFETs, such as voltage control, very fast switching,
ease of paralleling and electrical parameter temperature
stability. They are well-suited for applications such as switch-
ing power supplies, motor controls, inverters, choppers,
audio amplifiers, high energy pulse circuits, and virtually
any application where high reliability is required. The
HEXFET transistor’s totally isolated package eliminates the
need for additional isolating material between the device
and the heatsink. This improves thermal efficiency and
reduces drain capacitance.
Absolute Maximum Ratings (Per Die)
Parameter
ID @ VGS =± 10V, TC = 25°C Continuous Drain Current
ID @ VGS =± 10V, TC = 100°C Continuous Drain Current
IDM Pulsed Drain Current
PD @ TC = 25°C
Max. Power Dissipation
Linear Derating Factor
VGS
EAS
IAR
EAR
dv/dt
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
TJ
TSTG
Operating Junction
Storage Temperature Range
Lead Temperature
Weight
For footnotes refer to the last page
www.irf.com
MO-036AB
Features:
n Simple Drive Requirements
n Ease of Paralleling
n Hermetically Sealed
n Electrically Isolated
n Dynamic dv/dt Rating
n Light-weight
N-Channel
P-Channel Units
1.0 -1.0
0.6 -0.6 A
4.0 -4.0
1.4 1.4 W
0.011
0.011
W/°C
±20 ±20 V
75
75
mJ
— —A
— — mJ
5.5
-5.5
-55 to 150
V/ns
oC
300 (0.63 in./1.6 mm from case for 10s)
1.3 (Typical)
g
1
04/16/02

1 page




IRFG5110 pdf
N-Channel
Q1,Q3
IRFG5110
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
13a & b
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
www.irf.com
Fig 8. Maximum Safe Operating Area
5

5 Page





IRFG5110 arduino
VDS
L
RG
--1200V
tp
D .U .T.
IA S
0 .0 1
D R IV E R
P-Channel
Q2,Q4
VDD
A
IRFG5110
15V
Fig 25a. Unclamped Inductive Test Circuit
IAS
tp
V(BR)DSS
Fig 25b. Unclamped Inductive Waveforms
-10V
QGS
VG
QG
QGD
Charge
Fig 26a. Basic Gate Charge Waveform
www.irf.com
Fig 25c. Maximum Avalanche Energy
Vs. Drain Current
Current Regulator
Same Type as D.U.T.
-1120VV
.2µF
50K
.3µF
D.U.T.
-
+VDS
VGS
-3mA
IG ID
Current Sampling Resistors
Fig 26b. Gate Charge Test Circuit
11

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