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PI6C2501 の電気的特性と機能

PI6C2501のメーカーはPericom Semiconductorです、この部品の機能は「Phase-Locked Loop Clock Driver」です。


製品の詳細 ( Datasheet PDF )

部品番号 PI6C2501
部品説明 Phase-Locked Loop Clock Driver
メーカ Pericom Semiconductor
ロゴ Pericom Semiconductor ロゴ 




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PI6C2501 Datasheet, PI6C2501 PDF,ピン配置, 機能
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Phase-Locked Loop Clock Driver
Product Features
High-Performance, Phase-Locked-Loop Clock Distribution
Allows Clock Input to have Spread Spectrum modulation
for EMI reduction
Zero Input-to-Output delay
Low jitter: Cycle-to-Cycle jitter ±100ps max.
On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
Operates at 3.3V VCC
Wide range of Clock Frequencies up to 80 MHz
Package: Plastic 8-pin SOIC (W)
Product Description
The PI6C2501 features a low-skew, low-jitter, phase-locked loop
(PLL) clock driver. By connecting the CLK_OUT output to the
feedback FB_IN input, the propagation delay from the CLK_IN
input to CLK_OUT output will be nearly zero.
Application
If a system designer needs more than 16 outputs with the features
just described, using two or more zero-delay buffers, such as the
PI6C2509Q, or PI6C2510Q, is likely to be impractical. The
device-to-device skew introduced can significantly reduce the
performance. Pericom recommends using a zero-delay buffer and
an eighteen output non-zero-delay buffer. As shown in Figure 1,
this combination produces a zero-delay buffer with all the signal
characteristics of the original zero-delay buffer, but with as many
outputs as the non-zero-delay buffer part. For example, when
combined with an eighteen output non-zero delay buffer, a system
designer can create a seventeen-output zero-delay buffer.
Logic Block Diagram
Product Pin Configuration
CLK_IN
FB_IN
AVCC
PLL
CLK_OUT
AGND
GND
CLK_OUT
VCC
1
2
3
4
8-Pin
W
8 CLK_IN
7 AVCC
6 GND
5 FB_IN
Feedback
C
Reference
Clock
Signal
Zero Delay CLK_OUT 18 Outputs
Buffer
Non-PLL
PI6C2501
Buffer
17
Figure 1. This Combination Provides Zero-Delay Between
the Reference Clock Signal and 17 Outputs
1 PS8381A 07/17/00

1 Page





PI6C2501 pdf, ピン配列
PI6C2501
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Electrical Characteristics (Over Recommended Operating Free-Air Temperature Range
Pull Up/Down Currents of PI6C2501, VCC = 3.0V)
Symbol
Parameter
Condition
Min.
Pull-up current
IOH
Pull-up current
Vout = 2.4V
Vout = 2.0V
Pull-down current
IOL
Pull-down current
Vout = 0.8V
Vout = 0.55V
25
17
Max.
-18
-30
Units
mA
AC Specifications
(Timing requirements over recommended ranges of supply voltage and operating free-air temperature)
Symbol
Parameter
Min.
Max.
FCLK
Clock frequency PI6C2501
25 80
DCYI
Input clock duty cycle
Stabilization Time after power up
40 60
1
Units
MHz
%
ms
Switching Characteristics
(Over recommended ranges of supply voltage and operating free-air temperature, CL = 30pF)
Parameter
From (Input)
To (Output)
VCC = 3.3V ±0.3V, 0-70°C
Min. Typ. Max.
tphase error without jitter
CLK_INat 100 & 66 MHz
FB_IN
–150
+150
Jitter, cycle-to-cycle
Duty cycle
tr, rise-time, 0.4V to 2.0V
tf, fall-time, 2.0V to 0.4V
At 100 & 66 MHz
–100
+100
45 55
CLK_OUT
1.0
1.1
Note:
These switching parameters are guaranteed by design.
Units
ps
%
ns
3 PS8381A 07/17/00


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共有リンク

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PI6C2501

Phase-Locked Loop Clock Driver

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