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PDF IS41C16128 Data sheet ( Hoja de datos )

Número de pieza IS41C16128
Descripción 128K x 16 (2-MBIT) DYNAMIC RAM
Fabricantes ISSI 
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IS41C16128
IS41C16128
128K x 16 (2-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
ISSISISI®®
AUGUST 1998
FEATURES
• Extended Data-Out (EDO) Page Mode
access cycle
• TTL compatible inputs and outputs
• Refresh Interval: 512 cycles/8 ms
• Refresh Mode : RAS -Only, CAS -before-RAS
(CBR), and Hidden
• JEDEC standard pinout
• Single +5V ± 10% power supply
• Byte Write and Byte Read operation via two CAS
• Available in 40-pin SOJ and TSOP (Type II)
• Industrial temperature available
DESCRIPTION
The ISSI IS41C16128 is a 131,072 x 16-bit high-performance
CMOS Dynamic Random Access Memory. The IS41C16128
offers an accelerated cycle access called EDO Page Mode.
EDO Page Mode allows 256 random accesses within a
single row with access cycle time as short as 12 ns per 16-
bit word. The Byte Write control, of upper and lower byte,
makes the IS41C16128 ideal for use in 16-, 32-bit wide data
bus systems.
These features make the IS41C16128 ideally suited for
high band-width graphics, digital signal processing,
high-performance computing systems, and peripheral
applications.
The IS41C16128 is packaged in a 40-pin 400-mil SOJ and
TSOP (Type II).
FUNCTIONAL BLOCK DIAGRAM
OE
WE
LCAS
UCAS
CAS
CLOCK
GENERATOR
CAS
WE
CONTROL
LOGICS
WE
OE
CONTROL
LOGIC
RAS
RAS
CLOCK
GENERATOR
REFRESH
COUNTER
DATA I/O BUS
COLUMN DECODERS
SENSE AMPLIFIERS
I/O0-I/O15
A0-A8
ADDRESS
BUFFERS
MEMORY ARRAY
131,072 x 16
This document contains PRELIMINARY data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We
assume no responsibility for any errors which may appear in this publication. © Copyright 1998, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc.
PRELIMINARY DR002-1D
08/20/98
1

1 page




IS41C16128 pdf
IS41C16128
ISSI ®
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameters
Rating
Unit
VT
VCC
IOUT
PD
TA
TSTG
Voltage on Any Pin Relative to GND
Supply Voltage
Output Current
Power Dissipation
Operation Temperature
Com.
Ind.
Storage Temperature
–1.0 to +7.0
–1.0 to +7.0
50
1
0 to +70
–40 to +85
–55 to +125
V
V
mA
W
°C
°C
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
RECOMMENDED OPERATING CONDITIONS (Voltages are referenced to GND.)
Symbol
VCC
VIH
VIL
TA
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Ambient Temperature
Com.
Ind.
Min.
4.5
2.4
–1.0
0
–40
Typ. Max.
5.0 5.5
— VCC + 1.0
— +0.8
— +70
— +85
Unit
V
V
V
°C
CAPACITANCE(1,2)
Symbol
CIN1
CIN2
CIO
Parameter
Input Capacitance: A0-A8
Input Capacitance: RAS , UCAS , LCAS , WE , OE
Data Input/Output Capacitance: I/O0-I/O15
Max.
5
7
7
Unit
pF
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, VCC = 5.0V + 10%.
Integrated Silicon Solution, Inc.
PRELIMINARY DR002-1D
08/20/98
5

5 Page





IS41C16128 arduino
IS41C16128
EARLY WRITE CYCLE (OE = DON'T CARE)
RAS
tCRP
UCAS/LCAS
tASR
ADDRESS
Row
WE
tRAS
tRC
tRCD
tCSH
tRSH
tCAS tCLCH
tRAD
tRAH
tASC
tAR
tRAL
tCAH
tACH
Column
tWCR
tWCS
tCWL
tRWL
tWCH
tWP
tDS tDH
I/O Valid Data
ISSI ®
tRP
Row
Don't Care
Integrated Silicon Solution, Inc.
PRELIMINARY DR002-1D
08/20/98
11

11 Page







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