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ADM1172 の電気的特性と機能

ADM1172のメーカーはAnalog Devicesです、この部品の機能は「Hot Swap Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADM1172
部品説明 Hot Swap Controller
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADM1172 Datasheet, ADM1172 PDF,ピン配置, 機能
Data Sheet
2.7 V to 16.5 V Hot Swap Controller
with Power-Fail Comparator
ADM1172
FEATURES
Controls supply rails from 2.7 V to 16.5 V
Allows protected board removal and insertion to a live
backplane
External sense resistor provides adjustable analog current
limit with circuit breaker
Peak fault current limited with fast response
Charge pumped gate drive for external N-FET switch
Power-fail comparator
Automatic retry or latch-off during current fault
Undervoltage lockout
8-lead, TSOT package
APPLICATIONS
Hot swap board insertion: line cards, raid systems
Industrial high-side switches/circuit breakers
Electronic circuit breakers
GENERAL DESCRIPTION
The ADM1172 is a hot swap controller that safely enables a
printed circuit board to be removed and inserted to a live
backplane. This is achieved using an external N-channel power
MOSFET with a current control loop that monitors the load
current through a sense resistor. An internal charge pump is
used to enhance the gate of the N-channel FET. When an over-
current condition is detected, the gate voltage of the FET is
reduced to limit the current flowing through the sense resistor.
During an overcurrent condition, the TIMER pin capacitor
determines the amount of time the FET remains at a current
limiting mode of operation until it is shut down. The ON
(ON-CLR) pin is the enable input for the device and can be
used to monitor the input supply voltage. The ADM1172
operates with a supply voltage ranging from 2.7 V to 16.5 V.
The ADM1172 also features a power-fail comparator. The
voltage on the PFI pin is compared with an internal 0.6 V
reference, and the output of this comparator is presented on
the PFO pin. This device is available in two options: the
ADM1172-1 with automatic retry for overcurrent fault and the
ADM1172-2 with latch-off for an overcurrent fault. Toggling
the ON (ON-CLR) pin resets a latched fault. The ADM1172 is
packaged in an 8-lead TSOT.
VIN = 5V
GND
FUNCTIONAL BLOCK DIAGRAM
LONG
RSENSE
Q1
SHORT RON1
RON2
LONG
VCC SENSE
ON GATE
ADM1172-1
PFI
TIMER
GND
CTIMER
PFO
VOUT = 5V
CLOAD
RPR1
RPR2
GND
Figure 1.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 Page





ADM1172 pdf, ピン配列
ADM1172
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Characteristics .............................................................. 4
ESD Caution.................................................................................. 4
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 12
Overview...................................................................................... 12
REVISION HISTORY
3/14—Rev. 0 to Rev. A
Changes to Figure 41...................................................................... 14
Changes to Ordering Guide .......................................................... 15
7/06—Revision 0: Initial Version
Data Sheet
UVLO........................................................................................... 12
ON (ON-CLR) Pin..................................................................... 12
GATE ........................................................................................... 12
Current Limit Function ............................................................. 12
Calculating the Current Limit .................................................. 12
Circuit Breaker Function........................................................... 12
Timer Function........................................................................... 13
Power-Up Timing Cycle ............................................................ 13
Circuit Breaker Timing Cycle................................................... 14
Automatic Retry or Latched Off............................................... 14
Power-Fail Comparator ............................................................. 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
Rev. A | Page 2 of 16


3Pages


ADM1172 電子部品, 半導体
Data Sheet
ADM1172
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM1172-1AUJ
TIMER 1
8 VCC
GND 2 TOP VIEW 7 SENSE
PFO 3 (Not to Scale) 6 PFI
ON 4
5 GATE
Figure 2. Pin Configuration, 1AUJ Model
ADM1172-2AUJ
TIMER 1
8 VCC
GND 2 TOP VIEW 7 SENSE
PFO 3 (Not to Scale) 6 PFI
ON-CLR 4
5 GATE
Figure 3. Pin Configuration, 2AUJ Model
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 TIMER
Timer Input Pin. The initial and circuit breaker timing cycles are set by this external capacitor. The initial timing
delay is 272.9 ms/μF, and 21.7 ms/μF for a circuit breaker delay. When the TIMER pin is pulled beyond the upper
threshold, the GATE turns off.
2 GND
Chip Ground Pin.
3 PFO
Power-Fail Comparator Output. Digital output from the power-fail comparator.
4 ON (ON-CLR) Input Pin. The ON (ON-CLR) pin is an input to a comparator that has a low-to-high threshold of 1.3 V with 80 mV
hysteresis and a glitch filter. The ADM1172 is reset when the ON (ON-CLR) pin is low. When the ON (ON-CLR) pin is
high, the ADM1172 is enabled. A rising edge on this pin has the added function of clearing a fault and restarting
the device on the latched off model, the ADM1172-2.
5 GATE
Gate Output Pin. An internal charge pump provides a 12 μA pull-up current to drive the gate of an N-channel
MOSFET. In an overcurrent condition, the ADM1172 controls the external FET to maintain a constant load
current.
6 PFI
Power-Fail Comparator Input. Comparator threshold = 0.6 V.
7 SENSE
Current Limit Sense Input Pin. The current limit is set via a sense resistor between the VCC and SENSE pins. In an
overcurrent condition, the gate of the FET is controlled to maintain the SENSE voltage at 50 mV. When this limit is
reached, the TIMER circuit breaker mode is activated. The circuit breaker limit can be disabled by connecting the
VCC pin and SENSE pin together.
8 VCC
Positive Supply Input Pin. The ADM1172 operates between 2.7 V to 16.5 V. An undervoltage lockout (UVLO)
circuit with a glitch filter resets the ADM1172 when the supply voltage drops below the specified UVLO limit.
Rev. A | Page 5 of 16

6 Page



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