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PDF AM29PDLI27H Data sheet ( Hoja de datos )
| Número de pieza | AM29PDLI27H | |
| Descripción | Page Mode Simultaneous Read/Write Flash Memory | |
| Fabricantes | AMD | |
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Am29PDL127H
Data Sheet
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Publication Number 26864 Revision A Amendment +4 Issue Date June 30, 2003
1 page  
ADVANCE INFORMATION
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Simultaneous Operation Block Diagram . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 10
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 11
Table 1. Am29PDL127H Device Bus Operations ...........................11
Requirements for Reading Array Data ................................... 11
Random Read (Non-Page Read) ........................................... 11
Page Mode Read .................................................................... 11
Table 2. Page Select .......................................................................12
Simultaneous Operation ......................................................... 12
Table 3. Bank Select .......................................................................12
Writing Commands/Command Sequences ............................ 12
Accelerated Program Operation ............................................. 12
Autoselect Functions .............................................................. 12
Automatic Sleep Mode ........................................................... 13
RESET#: Hardware Reset Pin ............................................... 13
Output Disable Mode .............................................................. 13
Table 4. Am29PDL127H Sector Architecture ..................................14
Table 5. SecSiTM Sector Addresses ...............................................21
Table 6. Autoselect Codes (High Voltage Method) ........................22
Table 7. Am29PDL127H Boot Sector/Sector Block Addresses for
Protection/Unprotection ...................................................................23
Sector Protection . . . . . . . . . . . . . . . . . . . . . . . . . 24
Persistent Sector Protection ................................................... 24
Persistent Protection Bit (PPB) ............................................... 24
Persistent Protection Bit Lock (PPB Lock) ............................. 24
Dynamic Protection Bit (DYB) ................................................ 24
Table 8. Sector Protection Schemes ...............................................25
Persistent Sector Protection Mode Locking Bit ...................... 25
Password Protection Mode ..................................................... 25
Password and Password Mode Locking Bit ........................... 26
64-bit Password ...................................................................... 26
Write Protect (WP#) ................................................................ 26
Persistent Protection Bit Lock ................................................. 26
High Voltage Sector Protection .............................................. 27
Figure 1. In-System Sector Protection/
Sector Unprotection Algorithms ...................................................... 28
Temporary Sector Unprotect .................................................. 29
Figure 2. Temporary Sector Unprotect Operation........................... 29
SecSi™ (Secured Silicon) Sector
Flash Memory Region ............................................................ 29
Factory-Locked Area (64 words) ............................................ 29
Customer-Lockable Area (64 words) ...................................... 29
SecSi Sector Protection Bits ................................................... 30
Figure 3. SecSi Sector Protect Verify.............................................. 30
Hardware Data Protection ...................................................... 30
Low VCC Write Inhibit ............................................................ 30
Write Pulse “Glitch” Protection ............................................... 30
Logical Inhibit .......................................................................... 30
Power-Up Write Inhibit ............................................................ 30
Common Flash Memory Interface (CFI) . . . . . . . 30
Command Definitions . . . . . . . . . . . . . . . . . . . . . 34
Reading Array Data ................................................................ 34
Reset Command ..................................................................... 34
Autoselect Command Sequence ............................................ 34
Enter SecSi™ Sector/Exit SecSi Sector
Command Sequence .............................................................. 34
Word Program Command Sequence ...................................... 35
Unlock Bypass Command Sequence ..................................... 35
Figure 4. Program Operation ......................................................... 36
Chip Erase Command Sequence ........................................... 36
Sector Erase Command Sequence ........................................ 36
Figure 5. Erase Operation.............................................................. 37
Erase Suspend/Erase Resume Commands ........................... 37
Password Program Command ................................................ 37
Password Verify Command .................................................... 38
Password Protection Mode Locking Bit Program Command .. 38
Persistent Sector Protection Mode Locking Bit Program
Command ............................................................................... 38
SecSi Sector Protection Bit Program Command .................... 38
PPB Lock Bit Set Command ................................................... 38
DYB Write Command ............................................................. 38
Password Unlock Command .................................................. 39
PPB Program Command ........................................................ 39
All PPB Erase Command ........................................................ 39
DYB Write Command ............................................................. 39
PPB Lock Bit Set Command ................................................... 39
PPB Status Command ............................................................ 39
PPB Lock Bit Status Command .............................................. 39
Sector Protection Status Command ....................................... 39
Table 13. Memory Array Command Definitions ............................. 40
Table 14. Sector Protection Command Definitions ........................ 41
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 42
DQ7: Data# Polling ................................................................. 42
Figure 6. Data# Polling Algorithm .................................................. 42
DQ6: Toggle Bit I .................................................................... 43
Figure 7. Toggle Bit Algorithm........................................................ 43
DQ2: Toggle Bit II ................................................................... 44
Reading Toggle Bits DQ6/DQ2 ............................................... 44
DQ5: Exceeded Timing Limits ................................................ 44
DQ3: Sector Erase Timer ....................................................... 44
Table 15. Write Operation Status ................................................... 45
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 46
Figure 8. Maximum Negative Overshoot Waveform ...................... 46
Figure 9. Maximum Positive Overshoot Waveform........................ 46
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 47
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 10. Test Setup.................................................................... 48
Figure 11. Input Waveforms and Measurement Levels ................. 48
AC Characteristic . . . . . . . . . . . . . . . . . . . . . . . . . 49
Read-Only Operations ........................................................... 49
Figure 12. Read Operation Timings ............................................... 50
Figure 13. Page Read Operation Timings...................................... 50
Hardware Reset (RESET#) .................................................... 51
Figure 14. Reset Timings ............................................................... 51
Erase and Program Operations .............................................. 52
Figure 15. Program Operation Timings.......................................... 53
Figure 16. Accelerated Program Timing Diagram.......................... 53
Figure 17. Chip/Sector Erase Operation Timings .......................... 54
Figure 18. Back-to-back Read/Write Cycle Timings ...................... 55
Figure 19. Data# Polling Timings (During Embedded Algorithms). 55
Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 56
June 30, 2003
Am29PDL127H
3
5 Page 
ADVANCE INFORMATION
PIN DESCRIPTION
A22–A0
= 23-bit address bus for 128 Mb de-
vice. A9 supports 12 V autoselect in-
puts.
DQ15–DQ0 = 16-bit data inputs/outputs/float
CE#
= Chip Enable Inputs
OE#
= Output Enable Input
WE#
= Write Enable
VSS = Device Ground
NC = Pin Not Connected Internally
RY/BY#
= Ready/Busy output and open drain.
When RY/BY#= VIH, the device is
ready to accept read operations and
commands. When RY/BY#= VOL,
the device is either executing an em-
bedded algorithm or the device is
executing a hardware reset opera-
tion.
WP#/ACC = Write Protect/Acceleration Input.
When WP/ACC#= VIL, the highest
and lowest two 4K-word sectors are
write protected regardless of other
sector protection configurations.
When WP/ACC#= VIH, these sector
are unprotected unless the DYB or
PPB is programmed. When
WP/ACC#= 12V, program and erase
operations are accelerated.
VIO = Input/Output Buffer Power Supply
(1.65 V to 1.95 V or 2.7 V to 3.6 V)
VCC = Chip Power Supply
(2.7 V to 3.6 V or 2.7 to 3.3 V)
RESET# = Hardware Reset Pin
LOGIC SYMBOL
23
A22–A0
CE#
DQ15–DQ0
OE#
WE#
WP#/ACC
RESET#
RY/BY#
VIO (VCCQ)
16
June 30, 2003
Am29PDL127H
9
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AM29PDLI27H.PDF ] | |
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