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PDF PI6C10804 Data sheet ( Hoja de datos )
| Número de pieza | PI6C10804 | |
| Descripción | 1:4 Networking Clock Buffer | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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PI6C10804
1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer
Features
• High-speed, low-noise, non-inverting 1:4 buffer
• Maximum Frequency up to 250 MHz
• Low output skew < 150ps
• Low propagation delay < 3.0ns
• 1.8V or 2.5V supply voltage
• Packages (Pb-free & Green available):
-8-pin SOIC (W)
Description
The PI6C10804 is a 1.8V or 2.5V high-speed, low-noise
1:4 non-inverting clock buffer. The key goal in designing the
PI6C10804 is to target networking applications that require low-
skew, low-jitter, and high-frequency clock distribution.
Providing output-to-output skew as low as 150ps, the PI6C10804
is an ideal clock distribution device for synchronous systems. De-
signing synchronous networking systems requires a tight level of
skew from a large number of outputs.
Block Diagram
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Pin Configuration
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06-0035
Pin Description
Pin Name
Description
BUF_IN
Input
CLK [0:3]
Outputs
GND
Ground
VDD
Power
OE Output Enable
1 PS8822B 04/03/06
1 page  
Switching Waveforms
Propagation Delay
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Output Skew – tSK(O)
Input
tPLHx
CLKx
tSK(O)
CLKy
tPLHy
Vdd
Vdd/2
tPHLx
0V
VOH
Vdd/2
VOL
tSK(O)
VOH
Vdd/2
VOL
tPHLy
tSK(O) = | tPLHy - tPLHx | or | tPHLy - tPHLx |
PI6C10804
1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer
Pulse Skew – tSK(P)
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Package Skew – tSK(T)
Input
tPLH1
Part #1
Output
tSK(T)
Part #2
Output
tPLH2
Vdd
Vdd/2
tPHL1
0V
VOH
Vdd/2
VOL
tSK(T)
VOH
Vdd/2
VOL
tPHL2
tSK(T) = | tPLH2 - tPLH1 | or | tPHL2 - tPHL1 |
06-0035
5
PS8822B 04/03/06
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet PI6C10804.PDF ] | |
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