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PDF CYNCP80192 Data sheet ( Hoja de datos )
| Número de pieza | CYNCP80192 | |
| Descripción | Network Database Coprocessor | |
| Fabricantes | Cypress Semiconductor | |
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CYNCP80192
CYNCP80192 Network Database
Coprocessor
Cypress Semiconductor Corporation
Document #: 38-02043 Rev. *B
• 3901 North First Street
• San Jose, CA 95134 • 408-943-2600
Revised August 27, 2003
1 page  
CYNCP80192
1.0 Overview
Cypress Semiconductor Corporation’s (Cypress’s) network database coprocessor (NDC) performs the following three primary
functions.
• Interconnection bridge function. The CYNCP80192 device acts as a bridge between network processor(s) and a search
subsystem of Cypress’s CYNSE70XXX network search engines (NSEs) plus optional associated SSRAMs that contain
a search database and the associated data for a variety of network protocol layers. The CYNCP80192 device interfaces to
the network processor with an SSRAM interface and offloads the search function to provide support for fast packet processing
in routers and switches.
• Pipeline management function. Cypress’s NSEs have a pipelined architecture to optimize search performance and through-
put. The CYNCP80192 device manages the pipeline for optimal search performance and packs instructions back to back in
order to avoid any bubbles in the pipeline.
• Table management function. The CYNCP80192 device builds on the simple instructions of the NSEs to provide advanced
instructions for table management.
There are two ways to build the NDC system.
• In the first system the associative data SRAMs are connected to the CYNCP80192 device and the NSE(s) (see “NDC Subsystem
Power-up Initialization Procedure” on page 23), and the CYNCP80192 device returns the associated data in response to a
search operation. This type of implementation is suited to applications where the associative data size is up to eight bytes.
• In the second system, the CYNCP80192 device returns the index of the successful search entry to the network processor.
The network processor uses this index to access SSRAMs in order to get the required results. The SSRAMs containing the
associative data are connected directly to the network processor’s SSRAM bus. This is suitable for applications where the
associative data size is longer than eight bytes.
The NDC runs up to 100 MHz. At that speed and running with a 64-bit bus interface, the NDC performs at a peak rate of 33 million
searches on 68-bit entries, 25 million searches on 136-bit entries, and 16.67 million searches on 272-bit entries. At 100-MHz
speed and running with a 32-bit bus interface, the NDC performs at a peak rate of 25 million searches on 68-bit entries,
16.67 million searches on 136-bit entries, and 10 million searches on 272-bit entries.
The NDC supports centralized, multiple layer, multiwidth tables in order to provide cost effective search solutions for Ethernet,
asynchronous transfer mode (ATM), and Sonet-based switches and routing systems. It supports the following advanced capabil-
ities: quality of service (QoS), class of service (CoS), virtual private network (VPN), packet and flow classification, and security.
Document #: 38-02043 Rev. *B
Page 5 of 42
5 Page 
CYNCP80192
5.0 Clocks
The CYNPC80192 receives up to a 100-MHz master CLK at the coprocessor interface. The CYNPC80192 then generates the
CLK2X and a phase signal PHS_L for the NSEs, and the SCLK for the associative data SSRAMs, as shown in Figure 5-1.
Input CLK to CLK
CYNPC80192
Input signals CLK2X
for NSEs
PHS_L
CLK for SSRAMs SCLK
Figure 5-1. NDC Clocks
Document #: 38-02043 Rev. *B
Page 11 of 42
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CYNCP80192.PDF ] | |
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