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ISL6255 の電気的特性と機能

ISL6255のメーカーはIntersil Corporationです、この部品の機能は「Highly Integrated Battery Charger」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL6255
部品説明 Highly Integrated Battery Charger
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL6255 Datasheet, ISL6255 PDF,ピン配置, 機能
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®
Data Sheet
ISL6255, ISL6255A
April 19, 2005
FN9203.0
Highly Integrated Battery Charger with
Automatic Power Source Selector for
Notebook Computers
The ISL6255, ISL6255A is a highly integrated battery
charger controller for Li-Ion/Li-Ion polymer batteries. High
Efficiency is achieved by a synchronous buck topology and
the use of a MOSFET, instead of a diode, for selecting power
from the adapter or battery. The low side MOSFET emulates
a diode at light loads to improve the light load efficiency and
prevent system bus boosting.
The constant output voltage can be selected for 2, 3 and 4
series Li-Ion cells with 0.5% accuracy over temperature. It
can also be programmed between 4.2V+5%/cell and
4.2V-5%/cell to optimize battery capacity. When supplying
the load and battery charger simultaneously, the input
current limit for the AC adapter is programmable to within
3% accuracy to avoid overloading the AC adapter, and to
allow the system to make efficient use of available adapter
power for charging. It also has a wide range of
programmable charging current. The ISL6255, ISL6255A
provides outputs that are used to monitor the current drawn
from the AC adapter, and monitor for the presence of an AC
adapter. The ISL6255, ISL6255A automatically transitions
from regulating current mode to regulating voltage mode.
ISL6255, ISL6255A has a feature for automatic power
source selection by switching to the battery when the AC
adapter is removed or switching to the AC adapter when the
AC adapter is available. It also provides a DC adapter
monitor to support aircraft power applications with the option
of no battery charging.
Ordering Information
PART
NUMBER
TEMP
RANGE (°C)
PACKAGE
PKG.
DWG. #
ISL6255HRZ
(Notes 1, 2)
-10 to 100 28 Ld 5x5 QFN L28.5×5
(Pb-free)
ISL6255HAZ
(Notes 1, 2)
-10 to 100 28 Ld QSOP
(Pb-free)
M28.15
ISL6255AHRZ -10 to 100 28 Ld 5x5 QFN L28.5×5
(Notes 1, 2)
(Pb-free)
ISL6255AHAZ
(Notes 1, 2)
-10 to 100 28 Ld QSOP
(Pb-free)
M28.15
NOTES:
1. Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination
finish, which are RoHS compliant and compatible with both SnPb and Pb-
free soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
2. Add “-T” for Tape and Reel.
Features
• ±0.5% Charge Voltage Accuracy (-10°C to 100°C)
• ±3% Accurate Input Current Limit
• ±3% Accurate Battery Charge Current Limit
• ±25% Accurate Battery Trickle Charge Current Limit
(ISL6255A)
• Programmable Charge Current Limit, Adapter Current
Limit and Charge Voltage
• Fixed 300kHz PWM Synchronous Buck Controller with
Diode Emulation at Light Load
• Output for Current Drawn from AC Adapter
• AC Adapter Present Indicator
• Fast Input Current Limit Response
• Input Voltage Range 7V to 25V
• Support 2, 3 and 4 Cells Battery Pack
• Up to 17.64V Battery-Voltage Set Point
• Control Adapter Power Source Select MOSFET
• Thermal Shutdown
• Aircraft Power Capable
• DC Adapter Present Indicator
• Battery Discharge MOSFET Control
• Less than 10µA Battery Leakage Current
• Support Pulse Charging
• Charge Any Battery Chemistry: Li-Ion, NiCd, NiMH, etc
• Pb-Free Available (RoHS Compliant)
Applications
• Notebook, Desknote and Sub-notebook Computers
• Personal Digital Assistant
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL6255 pdf, ピン配列
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ISL6255, ISL6255A
Absolute Maximum Ratings
DCIN, CSIP, CSON to GND. . . . . . . . . . . . . . . . . . . . . -0.3V to +28V
CSIP-CSIN, CSOP-CSON . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
CSIP-SGATE, CSIP-BGATE . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
PHASE to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to 30V
BOOT to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +35V
BOOT-PHASE, VDD-GND, VDDP-PGND
ACPRN and DCPRN to GND . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
ACSET and DCSET to GND (Note 3) . . . . . . . . -0.3V to VDD+0.3V
ICM, ICOMP, VCOMP to GND. . . . . . . . . . . . . . -0.3V to VDD+0.3V
ACLIM, CHLIM, VREF, CELLS to GND . . . . . . . -0.3V to VDD+0.3V
EN, VADJ, PGND to GND . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V
UGATE. . . . . . . . . . . . . . . . . . . . . . . . . PHASE-0.3V to BOOT+0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . . . . . PGND-0.3V to VDDP+0.3V
Thermal Information
Thermal Resistance
θJA (°C/W) θJC (°C/W)
QFN Package (Notes 4, 5). . . . . . . . . .
39
9.5
QSOP Package (Note 4) . . . . . . . . . . .
80
NA
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2
Junction Temperature Range. . . . . . . . . . . . . . . . . .-10°C to +150°C
Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. When the voltage across ACSET and DCSET is below 0V, the current through ACSET and DCSET should be limited to less than 1mA.
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
DCIN=CSIP=CSIN=18V, CSOP=CSON=12V, ACSET=DCSET=1.5V, ACLIM=VREF, VADJ=Floating,
EN=VDD=5V, BOOT-PHASE=5.0V, GND=PGND=0V, CVDD=1µF, IVDD=0mA, TA=-10°C to +100°C,
TJ 125°C, unless otherwise noted.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY AND BIAS REGULATOR
DCIN Input Voltage Range
7 25 V
DCIN Quiescent Current
EN=VDD or GND, 7V DCIN 25V
1.4 43 mA
Battery Leakage Current (Note 6)
DCIN=0, no load
3 10 µA
VDD Output Voltage/Regulation
VDD Undervoltage Lockout Trip Point
7V DCIN 25V, 0 IVDD 30mA
VDD Rising
4.925
4.0
5.075
4.4
5.225
4.6
V
V
Hysteresis
200 250 400 mV
Reference Output Voltage VREF
Battery Charge Voltage Accuracy
0 IVREF 300µA
CSON=16.8V, CELLS=VDD, VADJ=Float
2.365
-0.5
2.39 2.415
0.5
V
%
CSON=12.6V, CELLS=GND, VADJ=Float
-0.5
0.5 %
CSON=8.4V, CELLS=Float, VADJ=Float
-0.5
0.5 %
CSON=17.64V, CELLS=VDD, VADJ=VREF
-0.5
0.5 %
CSON=13.23V, CELLS=GND, VADJ=VREF
-0.5
0.5 %
CSON=8.82V, CELLS=Float, VADJ=VREF
-0.5
0.5 %
CSON=15.96V, CELLS=VDD, VADJ=GND
-0.5
0.5 %
CSON=11.97V, CELLS=GND, VADJ=GND
-0.5
0.5 %
CSON=7.98V, CELLS=Float, VADJ=GND
-0.5
0.5 %
TRIP POINTS
ACSET Threshold
1.24 1.26 1.28 V
ACSET Input Bias Current Hysteresis
2.2 3.4 4.4 µA
ACSET Input Bias Current
ACSET 1.27V
2.2 3.4 4.4 µA
ACSET Input Bias Current
ACSET < 1.27V
-1 0 1 µA
DCSET Threshold
1.24 1.26 1.28 V
3 FN9203.0
April 19, 2005


3Pages


ISL6255 電子部品, 半導体
www.DataSheet4U.com
ISL6255, ISL6255A
Electrical Specifications
PARAMETER
DCIN=CSIP=CSIN=18V, CSOP=CSON=12V, ACSET=DCSET=1.5V, ACLIM=VREF, VADJ=Floating,
EN=VDD=5V, BOOT-PHASE=5.0V, GND=PGND=0V, CVDD=1µF, IVDD=0mA, TA=-10°C to +100°C,
TJ 125°C, unless otherwise noted. (Continued)
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ACPRN Leakage Current
ACPRN=5V
-0.5 0.5 µA
DCPRN Sink Current
DCPRN=0.4V
3 8 11 mA
DCPRN Leakage Current
DCPRN=5V
-0.5 0.5 µA
ICM Output Accuracy
(Vicm=19.9 (Vcsip-Vsin))
CSIP-CSIN=100mV
CSIP-CSIN=75mV
-3 0 +3 %
-4 0 +4 %
CSIP-CSIN=50mV
-5 0 +5 %
Thermal Shutdown Temperature
150 °C
Thermal Shutdown Temperature Hysteresis
25 °C
NOTE:
6. This is the sum of currents in these pins (CSIP, CSIN, BGATE, BOOT, UGATE, PHASE, CSOP, CSON) all tied to 16.8V. No current in pins EN,
ACSET, DCSET, VADJ, CELLS, ACLIM, CHLIM.
Typical Operating Performance DCIN=20V, 4S2P Li-Battery, TA=25°C, unless otherwise noted.
0.6
0.3
0
-0.3
VDD=5.075V
EN=0
0.1
VREF=2.390V
0.08
0.06
0.04
0.02
-0.6
0 8 16 24 32
LOAD CURRENT (mA)
FIGURE 1. VDD LOAD REGULATION
40
0
0 100 200 300
LOAD CURRENT (µA)
FIGURE 2. VREF LOAD REGULATION
400
10
9
8
7
6
5
4
3
2
1
0
10 20 30 40 50 60 70 80 90 100
CSIP-CSIN (mV)
FIGURE 3. ICM ACCURACY vs AC ADAPTER CURRENT
6
1
0 .9 6
0 .9 2
0 .8 8
0 .8 4
VCSON=12.6V
(3 CELLS)
VCSON=8.4V
2 CELLS
VCSON=16.8V
4 CELLS
0 .8
0 .76
0 0 .5 1 1.5 2 2.5 3 3 .5 4
CHARGE CURRENT (A)
FIGURE 4. SYSTEM EFFICIENCY vs CHARGE CURRENT
FN9203.0
April 19, 2005

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