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ADV212 の電気的特性と機能

ADV212のメーカーはAnalog Devicesです、この部品の機能は「Wavescale Video Codec」です。


製品の詳細 ( Datasheet PDF )

部品番号 ADV212
部品説明 Wavescale Video Codec
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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ADV212 Datasheet, ADV212 PDF,ピン配置, 機能
FEATURES
Implementation of a JPEG2000-compatible video CODEC for
video and still images through the ADV212 Wavescale
video compression/decompression engine
Identical pinout and footprint to the ADV202; and support
for all the functionality of the ADV202
Power reduction of at least 30% compared with ADV202
JTAG/boundary scan support
Patented spatial ultraefficient recursive filtering (SURF)
technology for low power, low cost wavelet-based
compression
Support for both 9/7 and 5/3 wavelet transforms with up to
5 levels of transform
9/7 wavelet support for tiles up to 1.048 million samples
5/3 wavelet support for tiles up to 262,144 samples
Video interface direct support for ITU-R BT.656, SMPTE 125M
PAL/NTSC, SMPTE 274M, SMPTE 293M (525p), and ITU-R
BT.1358 (625p) or any video format with a maximum input
rate of 65 MSPS for irreversible mode or 40 MSPS for
reversible mode
Programmable tile/image size with widths of up to
4096 pixels in single-component mode; maximum
tile/image height of 4096 pixels
Ability to combine 2 or more ADV212s to support full-frame
SMPTE 274M HDTV (1080i) or SMPTE 296M (720p)
Flexible, asynchronous SRAM-style host interface support
for glueless connection to most 16-/32-bit microcontrollers
and ASICs
2.5 V or 3.3 V input/output and 1.5 V core supply
2 package and speed grade options
12 mm × 12 mm, 121-ball CSP_BGA with a speed grade of
115 MHz
13 mm × 13 mm, 144-ball CSP_BGA with a speed grade of
150 MHz
Wavescale Video Codec
ADV212
APPLICATIONS
Networked video and image distribution systems
Wireless video and image distribution
Image archival/retrieval
Digital CCTV and surveillance systems
Digital cinema systems
Professional video editing and recording
Digital still cameras
Digital camcorders
GENERAL DESCRIPTION
The ADV212 Wavescale® video compression/decompression
(CODEC) is a single-chip JPEG2000 CODEC targeted for video
and high bandwidth image compression applications that can
benefit from the enhanced quality and features provided by the
JPEG2000 (J2K) ISO/IEC15444-1 image compression standard.
The part implements the computationally intensive operations
of the JPEG2000 image compression standard and provides
fully compliant code stream generation for most applications.
The dedicated video port of the ADV212 provides glueless con-
nection to common digital video standards such as ITU-R
BT.656, SMPTE 125M, SMPTE 293M (525p), ITU-R BT.1358
(625p), SMPTE 274M (1080i), and SMPTE 296M (720p). A
variety of other high speed, synchronous pixel and video
formats can also be supported by using the programmable
framing and validation signals.
The ADV212 is an upgrade version of the ADV202, which is
identical in pinout and footprint. It supports all of the func-
tionality of the ADV202 and has the following additional
options: JTAG/boundary scan support and power reduction of
at least 30% compared with the ADV202.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2006–2010 Analog Devices, Inc. All rights reserved.

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ADV212 pdf, ピン配列
The ADV212 can process images at a rate of 40 MSPS in
reversible mode and at higher rates when used in irreversible
mode. The ADV212 contains a dedicated wavelet transform
engine, three entropy CODECs, an on-board memory system,
and an embedded reduced instruction set computer (RISC)
processor that can provide a complete JPEG2000 compression/
decompression solution.
The wavelet processor supports the 9/7 irreversible wavelet
transform and the 5/3 wavelet transform in reversible and
irreversible modes. The entropy CODECs support all features
in the JPEG2000 Part 1 specification except maximum shift
region of interest (ROI).
The ADV212 operates on a rectangular array of pixel samples
called a tile. A tile can contain a complete image, up to the
maximum supported size, or some portion of an image. The
maximum horizontal tile size supported depends on the wavelet
transform selected and the number of samples in the tile.
Images larger than the ADV212 maximum tile size can be
broken into individual tiles and then sent sequentially to the
chip while maintaining a single, fully compliant JPEG2000 code
stream for the entire image.
ADV212
JPEG2000 FEATURE SUPPORT
The ADV212 supports a broad set of features that are included
in Part 1 of the JPEG2000 standard (ISO/IEC 15444).
Depending on the particular application requirements, the
ADV212 can provide varying levels of JPEG2000 compression
support. It can provide raw code block and attribute data
output, which allows the host software to have complete control
over generation of the JPEG2000 code stream and other aspects
of the compression process such as bit-rate control.
Additionally, the ADV212 can create a complete, fully
compliant JPEG2000 code stream (J2C) and enhanced file
formats such as JP2.
FUNCTIONAL BLOCK DIAGRAM
PIXEL I/F
HOST I/F
PIXEL I/F
EXTERNAL
DMA CTRL
PIXEL FIFO
CODE FIFO
ATTR FIFO
ADV212
WAVELET
ENGINE
EC1 EC2 EC3
INTERNAL BUS AND DMA ENGINE
EMBEDDED
RISC
PROCESSOR
SYSTEM
Figure 1.
RAM
ROM
Rev. B | Page 3 of 44


3Pages


ADV212 電子部品, 半導体
ADV212
NORMAL HOST MODE—WRITE OPERATION
Table 4.
Parameter
WE to ACK, Direct Registers and FIFO Accesses
WE to ACK, Indirect Registers
Data Setup
Data Hold
Address Setup
Address Hold
CS to WE Setup
CS Hold
Write Inactive Pulse Width (Minimum Time Until Next WE Pulse)
Write Active Pulse Width
Write Cycle Time
1 For a definition of JCLK, see Figure 32.
Mnemonic
tACK (direct)
tACK (indirect)
tSD
tHD
tSA
tHA
tSC
tHC
tWH
tWL
tWCYC
Min
5
5
3.0
1.5
2
2
0
0
2.5 JCLK1
2.5 JCLK1
5 JCLK1
ADDR
CS
WE
ACK
HDATA
tSA tHA
tSC tHC
tWCYC
tWL tWH
tACK
tHD
tSD
VALID
Figure 3. Normal Host Mode—Write Operation
Typ Max
1.5 × JCLK + 7.01
2.5 × JCLK + 7.01
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. B | Page 6 of 44

6 Page



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共有リンク

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部品番号部品説明メーカ
ADV212

Wavescale Video Codec

Analog Devices
Analog Devices


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