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ADM1062のメーカーはAnalog Devicesです、この部品の機能は「Super Sequencer with Margining Control and Temperature Monitoring」です。 |
部品番号 | ADM1062 |
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部品説明 | Super Sequencer with Margining Control and Temperature Monitoring | ||
メーカ | Analog Devices | ||
ロゴ | |||
このページの下部にプレビューとADM1062ダウンロード(pdfファイル)リンクがあります。 Total 30 pages
Data Sheet
Super Sequencer with Margining Control
and Temperature Monitoring
ADM1062
FEATURES
Complete supervisory and sequencing solution for up to
10 supplies
10 supply fault detectors enable supervision of supplies to
<0.5% accuracy at all voltages at 25°C
<1.0% accuracy across all voltages and temperatures
5 selectable input attenuators allow supervision of supplies to
14.4 V on VH
6 V on VP1 to VP4 (VPx)
5 dual-function inputs, VX1 to VX5 (VXx)
High impedance input to supply fault detector with
thresholds between 0.573 V and 1.375 V
General-purpose logic input
10 programmable driver outputs, PDO1 to PDO10 (PDOx)
Open-collector with external pull-up
Push/pull output, driven to VDDCAP or VPx
Open collector with weak pull-up to VDDCAP or VPx
Internally charge-pumped high drive for use with external
N-FET (PDO1 to PDO6 only)
Sequencing engine (SE) implements state machine control of
PDO outputs
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Complete voltage margining solution for 6 voltage rails
6 voltage output, 8-bit DACs (0.300 V to 1.551 V) allow voltage
adjustment via dc-to-dc converter trim/feedback node
12-bit ADC for readback of all supervised voltages
Internal and external temperature sensors
Reference input (REFIN) has 2 input options
Driven directly from 2.048 V (±0.25%) REFOUT pin
More accurate external reference for improved
ADC performance
Device powered by the highest of VPx, VH for improved
redundancy
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPx = 1.2 V
Available in 40-lead, 6 mm × 6 mm LFCSP and
48-lead, 7 mm × 7 mm TQFP packages
FUNCTIONAL BLOCK DIAGRAM
DP DN
REFIN REFOUT REFGND SDA SCL A1 A0
ADM1062
TEMP
SENSOR
INTERNAL
DIODE
VREF
SMBus
INTERFACE
VX1
VX2
VX3
VX4
VX5
VP1
VP2
VP3
VP4
VH
AGND
12-BIT
SAR ADC
CLOSED-LOOP
MARGINING SYSTEM
DUAL-
FUNCTION
INPUTS
(LOGIC INPUTS
OR
SFDs)
PROGRAMMABLE
RESET
GENERATORS
(SFDs)
SEQUENCING
ENGINE
VOUT VOUT VOUT VOUT VOUT VOUT
DAC DAC DAC DAC DAC DAC
EEPROM
CONFIGURABLE
OUTPUT
DRIVERS
(HV CAPABLE OF
DRIVING GATES
OF N-FET)
CONFIGURABLE
OUTPUT
DRIVERS
(LV CAPABLE
OF DRIVING
LOGIC SIGNALS)
VDD
ARBITRATOR
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PDO9
PDO10
PDOGND
VDDCA P
DAC1 DAC2 DAC3 DAC4 DAC5 DAC6
Figure 1.
VCCP GND
APPLICATIONS
Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
GENERAL DESCRIPTION
The ADM1062 Super Sequencer® is a configurable supervisory/
sequencing device that offers a single-chip solution for supply
monitoring and sequencing in multiple-supply systems. In addition
to these functions, the ADM1062 integrates a 12-bit ADC and six
8-bit voltage output DACs. These circuits can be used to implement
a closed-loop margining system that enables supply adjustment
by altering either the feedback node or the reference of a dc-to-dc
converter using the DAC outputs.
For more information about the ADM1062 register map, refer
to the AN-698 Application Note.
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2005–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 Page ADM1062
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Detailed Block Diagram .................................................................. 4
Specifications..................................................................................... 5
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution.................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Typical Performance Characteristics ........................................... 11
Powering the ADM1062 ................................................................ 14
Slew Rate Consideration............................................................ 14
Inputs................................................................................................ 15
Supply Supervision..................................................................... 15
Programming the Supply Fault Detectors............................... 15
Input Comparator Hysteresis.................................................... 15
Input Glitch Filtering ................................................................. 16
Supply Supervision with VXx Inputs....................................... 16
VXx Pins as Digital Inputs ........................................................ 17
Outputs ............................................................................................ 18
Supply Sequencing Through Configurable Output Drivers.......18
Default Output Configuration.................................................. 18
Sequencing Engine ......................................................................... 19
Overview...................................................................................... 19
Warnings...................................................................................... 19
SMBus Jump (Unconditional Jump)........................................ 19
Data Sheet
Sequencing Engine Application Example ............................... 20
Fault and Status Reporting........................................................ 21
Voltage Readback............................................................................ 22
Supply Supervision with the ADC ........................................... 22
Supply Margining ........................................................................... 23
Overview ..................................................................................... 23
Open-Loop Supply Margining ................................................. 23
Closed-Loop Supply Margining ............................................... 23
Writing to the DACs .................................................................. 24
Choosing the Size of the Attenuation Resistor....................... 24
DAC Limiting and Other Safety Features ............................... 24
Temperature Measurement System.............................................. 25
Remote Temperature Measurement ........................................ 25
Applications Diagram .................................................................... 27
Communicating with the ADM1062........................................... 28
Configuration Download at Power-Up................................... 28
Updating the Configuration ..................................................... 28
Updating the Sequencing Engine............................................. 29
Internal Registers........................................................................ 29
EEPROM ..................................................................................... 29
Serial Bus Interface..................................................................... 29
SMBus Protocols for RAM and EEPROM.............................. 32
Write Operations ........................................................................ 32
Read Operations......................................................................... 34
Outline Dimensions ....................................................................... 35
Ordering Guide .......................................................................... 35
Rev. D | Page 2 of 35
3Pages Data Sheet
ADM1062
SPECIFICATIONS
VH = 3.0 V to 14.4 V1, VPx = 3.0 V to 6.0 V1, TA = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
POWER SUPPLY ARBITRATION
VH, VPx
VPx
VH
VDDCAP
CVDDCAP
POWER SUPPLY
Supply Current, IVH, IVPx
Additional Currents
All PDO FET Drivers On
Current Available from VDDCAP
DAC Supply Currents
ADC Supply Current
EEPROM Erase Current
SUPPLY FAULT DETECTORS
VH Pin
Input Impedance
Input Attenuator Error
Detection Ranges
High Range
Midrange
VPx Pins
Input Impedance
Input Attenuator Error
Detection Ranges
Midrange
Low Range
Ultralow Range
VXx Pins
Input Impedance
Detection Range
Ultralow Range
Absolute Accuracy
Threshold Resolution
Digital Glitch Filter
ANALOG-TO-DIGITAL CONVERTER
Signal Range
Min Typ
3.0
2.7 4.75
10
4.2
1
2.2
1
10
Max Unit
V
6.0 V
14.4 V
5.4 V
μF
6 mA
mA
2 mA
mA
mA
mA
52
±0.05
kΩ
%
6 14.4 V
2.5 6 V
52
±0.05
kΩ
%
2.5
1.25
0.573
6
3
1.375
V
V
V
1 MΩ
0.573
8
0
100
1.375 V
±1 %
Bits
μs
μs
0 VREFIN V
Input Reference Voltage on REFIN Pin, VREFIN
Resolution
INL
Gain Error
2.048
12
±2.5
±0.05
V
Bits
LSB
%
Test Conditions/Comments
Minimum supply required on one of the VH, VPx pins
Maximum VDDCAP = 5.1 V, typical
VDDCAP = 4.75 V
Regulated LDO output
Minimum recommended decoupling capacitance
VDDCAP = 4.75 V, PDO1 to PDO10 off, DACs off, ADC off
VDDCAP = 4.75 V, PDO1 to PDO6 loaded with 1 μA each,
PDO7 to PDO10 off
Maximum additional load that can be drawn from all
PDO pull-ups to VDDCAP
Six DACs on with 100 μA maximum load on each
Running round-robin loop
1 ms duration only, VDDCAP = 3 V
Midrange and high range
Low range and midrange
No input attenuation error
No input attenuation error
VREF error + DAC nonlinearity + comparator offset error +
input attenuation error
Minimum programmable filter length
Maximum programmable filter length
The ADC can convert signals presented to the VH, VPx,
and VXx pins; VPx and VH input signals are attenuated
depending on the selected range; a signal at the pin
corresponding to the selected range is from 0.573 V to
1.375 V at the ADC input
Endpoint corrected, VREFIN = 2.048 V
VREFIN = 2.048 V
Rev. D | Page 5 of 35
6 Page | |||
ページ | 合計 : 30 ページ | ||
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