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IS93C46A の電気的特性と機能

IS93C46AのメーカーはISSIです、この部品の機能は「1024-BIT SERIAL ELECTRICALLY ERASABLE PROM」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS93C46A
部品説明 1024-BIT SERIAL ELECTRICALLY ERASABLE PROM
メーカ ISSI
ロゴ ISSI ロゴ 




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IS93C46A Datasheet, IS93C46A PDF,ピン配置, 機能
www.DataSheet4U.com
IS93C46A
ISSI ®
1,024-BIT SERIAL ELECTRICALLY
ERASABLE PROM
JUNE 2004
FEATURES
DESCRIPTION
• Industry-standard Microwire Interface
— Non-volatile data storage
— Low voltage operation:
Vcc = 2.5V to 5.5V
— Full TTL compatible inputs and outputs
— Auto increment for efficient data dump
• User Configured Memory Organization
— By 16-bit or by 8-bit
The IS93C46A is a low-cost 1kb non-volatile,
ISSI ® serial EEPROM. It is fabricated using an
enhanced CMOS design and process. The
IS93C46A contains power-efficient read/write
memory, and organization of 128 bytes of 8 bits
or 64 words of 16 bits. When the ORG pin is
connected to Vcc or left unconnected, x16 is
selected; when it is connected to ground, x8 is
• Hardware and software write protection
selected. The IS93C46A is fully backward
— Defaults to write-disabled state at power-up
compatible with IS93C46.
— Software instructions for write-enable/disable
• Enhanced low voltage CMOS E2PROM
technology
An instruction set defines the operation of the
devices, including read, write, and mode-enable
functions. To protect against inadvertent data
• Versatile, easy-to-use Interface
modification, all erase and write instructions are
— Self-timed programming cycle
accepted only while the device is write-enabled. A
— Automatic erase-before-write
— Programming status indicator
— Word and chip erasable
— Chip select enables power savings
selected x8 byte or x16 word can be modified with
a single WRITE or ERASE instruction.
DataShee
DataSheet4U.Acodmditionally, the two instructions WRITE ALL or
ERASE ALL can program the entire array. Once
• Durable and reliable
a device begins its self-timed program procedure,
— 40-year data retention after 1M write cycles
— 1 million write cycles
the data out pin (Dout) can indicate the READY/
BUSY status by raising chip select (CS). The self-
— Unlimited read cycles
timed write cycle includes an automatic erase-
— Schmitt-trigger inputs
before-write capability. The device can output any
number of consecutive bytes/words using a single
READ instruction.
FUNCTIONAL BLOCK DIAGRAM
DIN
INSTRUCTION
REGISTER
CS
SK
INSTRUCTION
DECODE,
CONTROL,
AND
CLOCK
GENERATION
DATA
REGISTER
ADDRESS
REGISTER
WRITE
ENABLE
DUMMY
BIT
R/W
AMPS
ADDRESS
DECODER
HIGH VOLTAGE
GENERATOR
DOUT
EEPROM
ARRAY
128x8
64x16
Copyright © 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
DataSheet4Uob.tcaoinmthe latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. E
06/07/04
DataSheet4 U .com
1

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IS93C46A pdf, ピン配列
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IS93C46A
ISSI ®
et4U.com
Write Enable (WEN)
Write All (WRALL)
The write enable (WEN) instruction must be executed
before any device programming (WRITE, WRALL,
ERASE, and ERAL) can be done. When Vcc is applied,
this device powers up in the write disabled state. The
device then remains in a write disabled state until a WEN
instruction is executed. Thereafter, the device remains
enabled until a WDS instruction is executed or until Vcc
is removed. (See Figure 4.) (Note: Chip select must
remain LOW until Vcc reaches its operational value.)
Write (WRITE)
The write all (WRALL) instruction programs all registers
with the data pattern specified in the instruction. As with the
WRITE instruction, the falling edge of CS must occur to
initiate the self-timed programming cycle. If CS is then
brought HIGH after a minimum wait of 250 ns (tCS), the
DOUT pin indicates the READY/BUSY status of the chip (see
Figure 6).
Write Disable (WDS)
The write disable (WDS) instruction disables all programming
capabilities. This protects the entire device against acci-
The WRITE instruction includes 8 or 16 bits of data to be
dental modification of data until a WEN instruction is
written into the specified register. After the last data bit
executed. (When Vcc is applied, this part powers up in the
has been applied to DIN, and before the next rising edge
write disabled state.) To protect data, a WDS instruction
of SK, CS must be brought LOW. If the device is write-
should be executed upon completion of each programming
enabled, then the falling edge of CS initiates the self-
operation.
timed programming cycle (see WEN).
Erase Register (ERASE)
If CS is brought HIGH, after a minimum wait of 250 ns (5V
operation) after the falling edge of CS (tCS) DOUT will
After the erase instruction is entered, CS must be brought
indicate the READY/BUSY status of the chip. Logical “0”
LOW. The falling edge of CS initiates the self-timed internal
means programming is still in progress; logical “1” means
the selected register has been written, and the part is
programming cycle. Bringing CS HIGH after a minimum of
tCS, will cause DOUT to indicate the READ/BUSY status of the
ready for another instruction (see Figure 5). The READY/
BUSY status will not be available if: a) The CS input goes
chip: a logical “0” indicates programming
a logical “1” indicates the erase cycle is
cisosmtiplllientperaongdretshsDe; ataShee
HIGH after the end of the self-timed programmingDcaytcalSe,heet4U.pcaormt is ready for another instruction (see Figure 8).
tWP; or b) Simultaneously CS is HIGH, Din is HIGH, and
SK goes HIGH, which clears the status flag.
Erase All (ERAL)
Full chip erase is provided for ease of programming. Erasing
the entire chip involves setting all bits in the entire memory
array to a logical “1” (see Figure 9).
INSTRUCTION SET - IS93C46A
Instruction
Start Bit
READ
1
WEN (Write Enable)
1
WRITE
1
WRALL (Write All Registers) 1
WDS (Write Disable)
1
ERASE
1
ERAL (Erase All Registers) 1
OP Code
10
00
01
00
00
11
00
8-bit Organization
(ORG = GND)
Address (1) Input Data
(A6-A0)
11xxxxx
(A6-A0)
(D7-D0) (3)
01xxxxx (D7-D0) (3)
00xxxxx
(A6-A0)
10xxxxx
Notes:
1. x = Don't care bit.
2. If input data is not 16 bits exactly, the last 16 bits will be taken as input data.
3. If input data is not 8 bits exactly, the last 8 bits will be taken as input data.
DataSheet4U.com
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. E
06/07/04
DataSheet4 U .com
16-bit Organization
(ORG = Vcc)
Address (1) Input Data
(A5-A0)
11xxxx
(A5-A0) (D15-D0) (2)
01xxxx (D15-D0) (2)
00xxxx
(A5-A0)
10xxxx
3


3Pages


IS93C46A 電子部品, 半導体
www.DataSheet4U.com
IS93C46A
ISSI ®
POWER SUPPLY CHARACTERISTICS
TA = 0°C to +70°C for Commercial
Symbol Parameter
ICC1 Vcc Read Supply Current
ICC2 Vcc Write Supply Current
ISB StandbyCurrent
Test Conditions
CS = VIH, SK = 1 MHz
CMOS input levels
CS = VIH, SK = 1 MHz
CMOS input levels
CS = VIH, SK = 0V
Vcc Min.
2.7V —
5.0V —
2.7V —
5.0V —
2.7V —
5.0V —
Max.
100
500
1
3
10
30
Unit
µA
µA
mA
mA
µA
µA
POWER SUPPLY CHARACTERISTICS
TA = –40°C to +85°C for Industrial
Symbol Parameter
et4U.com ICC1
Vcc Read Supply Current
ICC2 Vcc Write Supply Current
ISB StandbyCurrent
Test Conditions
Vcc
CS = VIH, SK = 1 MHz
CMOS input levels
2.7V
5.0V
CS = VIH, SK =D1aMtaHSzheet4U.com2.7V
CMOS input levels
5.0V
CS = VIH, SK = 0V
2.7V
5.0V
Min.
Max.
100
500
1
3
2
4
Unit
µA
µA
mA
mA
µA
µA
DataShee
POWER SUPPLY CHARACTERISTICS
TA = –40°C to +125°C for Automotive
Symbol Parameter
ICC1 Vcc Read Supply Current
ICC2 Vcc Write Supply Current
ISB StandbyCurrent
Test Conditions
CS = VIH, SK = 1 MHz
CMOS input levels
CS = VIH, SK = 1 MHz
CMOS input levels
CS = VIH, SK = 0V
Vcc
2.7V
5.0V
2.7V
5.0V
2.7V
5.0V
Min.
Max.
100
500
1
3
3
8
Unit
µA
µA
mA
mA
µA
µA
DataSheet4U.com
6
DataSheet4 U .com
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. E
06/07/04

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