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Datasheet HI-8482 PDF ( 特性, スペック, ピン接続図 )

部品番号 HI-8482
部品説明 ARINC 429 DUAL LINE RECEIVER
メーカ Holt Integrated Circuits
ロゴ Holt Integrated Circuits ロゴ 
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HI-8482 Datasheet, HI-8482 PDF,ピン配置, 機能
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February 2001
GENERAL DESCRIPTION
PIN CONFIGURATIONS (Top Views)
The HI-8482 bus interface unit is a silicon gate CMOS de-
vice designed as a dual differential line receiver in accor-
dance with the requirements of the ARINC 429 bus spec-
ification. The device translates incoming ARINC 429 sig-
nals to normal CMOS/TTL levels on each of its two inde-
pendent receive channels. The HI-8482 is also function-
ally equivalent to the Fairchild/Raytheon RM3183.
The self-test inputs force the outputs to either a ZERO,
ONE, or NULL state for system tests. While in self-test
mode, the ARINC inputs are ignored.
All the ARINC inputs have built-in hysteresis to reject
noise that may be present on the ARINC bus. Additional
input noise filtering can also be accomplished with exter-
nal capacitors.
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
The HI-8482 line receiver is one of several options of-
fered by Holt Integrated Circuits to interface to the ADRaINtaCSheet4U.com
bus. The digital data processing for serial-to-parallel con-
version and clock recovery can be accomplished with the
-VS - 1
HI-6010, HI-8683 or similar devices.
TESTA - 2
CAP2B - 3
The HI-8482 is available in a variety of ceramic & plastic
IN2B - 4
packages including Small Outline (SOIC), J-Lead PLCC,
Cerquad, DIP & Leadless Chip Carrier (LCC).
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
FEATURES
+VL - 9
N/C - 10
HI-8482J
HI-8482JT
20 - PIN
PLASTIC
J-LEAD PLCC
HI-8482PSI
HI-8482PST
20 - PIN
PLASTIC
SMALL
OUTLINE
(SOIC) - WB
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
DataShee
20 - TESTB
19 - CAP1A
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
13 - N/C
12 - OUT1B
11 - +VS
! Converts ARINC 429 levels to digital data
! Direct replacement for the RM3183
! Greater than 2 volt receiving hysteresis
! TTL and CMOS outputs and test inputs
! Military screening available
! 20-Pin SOIC, PLCC, CERQUAD. DIP &
LCC packages are available
DataSheet4U.com
ARINC INPUTS
V (A) - V (B)
Null
Zero
One
Don't Care
Don't Care
Don't Care
TRUTH TABLE
TEST INPUTS
TEST A TEST B
00
00
00
01
10
11
OUTPUTS
OUT A OUT B
00
01
10
01
10
00
(DS8482 Rev. C)
DaStheet 4 Ucom.
HOLT INTEGRATED CIRCUITS
1
02/01

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HI-8482 pdf, ピン配列
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HI-8482
TYPICAL APPLICATIONS
APPLICATIONS
The standard connections for the HI-8482 are shown in Figure 2.
Decoupling of the supply should be done near the IC to avoid
propagation of noise spikes due to switching transients. The
ground (GND) connection should be sturdy and isolated from large
switching currents to provide a quiet ground reference.
The HI-8482 can be used with HI-8382 or HI-8585 Line Drivers to
provide a complete analog ARINC 429 interface solution. A simple
application, which can be used in systems requiring a repeater
type circuit for long transmissions or for test interfaces, is given in
Figure 3. More HI-8382 or HI-8585 drivers may be added to test
multiple ARINC channels, as shown.
ARINC RECEIVER STANDARD CONNECTIONS
+5V +15V
ARINC
CHANNEL 1
ARINC
CHANNEL 2
et4U.com
LOGIC
TEST
INPUTS
HI-8482
IN1A
OUT1A
39 pF
39 pF
IN1B
CAP1A
CAP1B
OUT1B
39 pF
39 pF
IN2A
IN2B
CAP2A
CAP2B
OUT2A
OUT2B
DataSTEhSeTeAt4U.com
TESTB
N/C
N/C
A CHANNEL 1
DATA OUT
B TO LOGIC
A CHANNEL 2
DATA OUT
B TO LOGIC
DataShee
-15V
ARINC
INPUT
CHANNEL
IN1A
IN1B
ARINC REPEATER CIRCUIT
OUT1A
OUT1B
DATA (A)
DATA (B)
AOUT
BOUT
DATA (A)
DATA (B)
AOUT
BOUT
A ARINC
OUTPUT
B CHANNEL 1
A ARINC
OUTPUT
B CHANNEL 2
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HI-8482 電子部品, 半導体
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HI-8482
ADDITIONAL HI-8482 PIN CONFIGURATIONS
(All 20-Pin Package Configurations)
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
HI-8482U
HI-8482UT
20-PIN
J-LEAD
CERQUAD
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
HI-8482S
HI-8482ST
HI-8482SM-01
20-PIN
CERAMIC LCC
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
et4U.com
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-VS - 1
TESTA - 2
CAP2B - 3
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
+VL - 9
N/C - 10
HI-8482C
HI-8482CT
HI-8482CM-01
20-PIN
CERAMIC
SIDE-BRAZED
DIP
20 - TESTB
19 - CAP1A
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
13 - N/C
12 - OUT1B
11 - +VS
-VS - 1
TESTA - 2
CAP2B - 3
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
+VL - 9
N/C - 10
HI-8482D
HI-8482DT
20-PIN
CERDIP
20 - TESTB
19 - CAP1A
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
13 - N/C
12 - OUT1B
11 - +VS
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