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PDF HI-8482 Data sheet ( Hoja de datos )
| Número de pieza | HI-8482 | |
| Descripción | ARINC 429 DUAL LINE RECEIVER | |
| Fabricantes | Holt Integrated Circuits | |
| Logotipo |  |
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www.DataSheet4U.com
February 2001
GENERAL DESCRIPTION
PIN CONFIGURATIONS (Top Views)
The HI-8482 bus interface unit is a silicon gate CMOS de-
vice designed as a dual differential line receiver in accor-
dance with the requirements of the ARINC 429 bus spec-
ification. The device translates incoming ARINC 429 sig-
nals to normal CMOS/TTL levels on each of its two inde-
pendent receive channels. The HI-8482 is also function-
ally equivalent to the Fairchild/Raytheon RM3183.
The self-test inputs force the outputs to either a ZERO,
ONE, or NULL state for system tests. While in self-test
mode, the ARINC inputs are ignored.
All the ARINC inputs have built-in hysteresis to reject
noise that may be present on the ARINC bus. Additional
input noise filtering can also be accomplished with exter-
nal capacitors.
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
The HI-8482 line receiver is one of several options of-
fered by Holt Integrated Circuits to interface to the ADRaINtaCSheet4U.com
bus. The digital data processing for serial-to-parallel con-
version and clock recovery can be accomplished with the
-VS - 1
HI-6010, HI-8683 or similar devices.
TESTA - 2
CAP2B - 3
The HI-8482 is available in a variety of ceramic & plastic
IN2B - 4
packages including Small Outline (SOIC), J-Lead PLCC,
Cerquad, DIP & Leadless Chip Carrier (LCC).
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
FEATURES
+VL - 9
N/C - 10
HI-8482J
HI-8482JT
20 - PIN
PLASTIC
J-LEAD PLCC
HI-8482PSI
HI-8482PST
20 - PIN
PLASTIC
SMALL
OUTLINE
(SOIC) - WB
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
DataShee
20 - TESTB
19 - CAP1A
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
13 - N/C
12 - OUT1B
11 - +VS
! Converts ARINC 429 levels to digital data
! Direct replacement for the RM3183
! Greater than 2 volt receiving hysteresis
! TTL and CMOS outputs and test inputs
! Military screening available
! 20-Pin SOIC, PLCC, CERQUAD. DIP &
LCC packages are available
DataSheet4U.com
ARINC INPUTS
V (A) - V (B)
Null
Zero
One
Don't Care
Don't Care
Don't Care
TRUTH TABLE
TEST INPUTS
TEST A TEST B
00
00
00
01
10
11
OUTPUTS
OUT A OUT B
00
01
10
01
10
00
(DS8482 Rev. C)
DaStheet 4 Ucom.
HOLT INTEGRATED CIRCUITS
1
02/01
1 page  
www.DataSheet4U.com
HI-8482
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to Gnd = 0V)
Supply Voltage, +VS:......................................................................+20 VDC
-VS: .......................................................................-20 VDC
+VL:........................................................................+7 VDC
Operating Temperature Range: (Industrial) .........................-40°C to +85°C
(Hi-Temp) ........................-55°C to +125°C
(Military) ..........................-55°C to +125°C
Internal Power Dissipation: ..............................................................900mW
Voltage at ARINC Inputs: .......................................................-29V to +29V
Voltage at Any Other Input:.............................................-0.3V to VL + 0.3V
Output Short Circuit Protected: .............................................Not Protected
Storage Temperature Range: .........................................-65°C to +150°C
Soldering Temperature: (Ceramic).................................30 sec. at +300°C
(Plastic - leads)........................10 sec. at +280°C
(Plastic - body) ................................+220°C Max.
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only.
Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
±12 < VS < ±15, VL = +5V, Operating temperature range (unless otherwise noted)
PARAMETERS
SYMBOL TEST CONDITIONS
MIN TYP MAX UNITS
ARINC inputs - IN1A, IN1B, IN2A, IN2B
V(A) - V(B)
V(A) - V(B)
V(A) - V(B)
et4U.com
(|V(A)| - |V(B)|) /
Input resistance
2
-
input A to input B
Input resistance - input A or B to Gnd
Input capacitance - input A to B
Input capacitance - input A or B to Gnd
VIH
VIL
VNULL
VCM
RI
RG
CI
CG
OUTA = 1
OUTB = 1
OUTA = OUTB = 0
Frequency = 80KHz
Supply pins floating
Supply pins floating
FilterDcaatpasSdhiseceotn4nUec.cteodm -
Filter caps disconnected -
see note 1
see note 1
6.5 10 13 volts
-6.5 -10 -13 volts
-2.5 0
2.5 volts
±5
30K 50K
volts
ohms DataShee
19K 25K
ohms
5 10 pF
5 10 pF
Tes t inputs - TESTA, TESTB
Logic 1 input voltage
Logic 0 input voltage
Logic 1 input current (magnitude)
Logic 0 input current
VIH ARINC inputs to Gnd
VIL ARINC inputs to Gnd
IIH VIH = 2.7V
IIL VIL = 0V
2.7 volts
0.8 volts
5 15 µA
0.5 1
µA
Outputs - OUT1A, OUT1B, OUT2A, OUT2B
Voltage - sourcing 100µA
Voltage - sourcing 2.8mA
Voltage - sinking 100µA
Voltage - sinking 2.0mA
Rise time
Fall time
VOH
VOH
VOL
VOL
tr
tf
Propagation delay - low to high (ARINC)
tPLH
Propagation delay - high to low (ARINC)
tPHL
Propagation delay - low to high (TESTA/B) tTLH
Propagation delay - low to high (TESTA/B) tTHL
TA = 25°C
Full temperature range
TA = 25°C
Full temperature range
CL = 50pF, TA = 25°C
CL = 50pF, TA = 25°C
CL = 50pF, TA = 25°C and filter caps disconnected
CL = 50pF, TA = 25°C and filter caps disconnected
CL = 50pF, TA = 25°C
CL = 50pF, TA = 25°C
4
3.5
0.08
0.8
40 70
30 70
600
600
50
50
volts
volts
volts
volts
ns
ns
ns
ns
ns
ns
Supply current
+VS current
+VS current
-VS current
-VS current
+VL current
+VL current
DataSheet4NUo.tceosm:
IDD ±VS = ±15V, TA =25°C, TESTA and TESTB = 0V
IDD ±VS = ±12V, TA =25°C, TESTA and TESTB = 0V
IEE ±VS = ±15V, TA =25°C, TESTA and TESTB = 0V
IEE ±VS = ±12V, TA =25°C, TESTA and TESTB = 0V
ICC ±VS = ±15V, TA =25°C, TESTA and TESTB = 0V
ICC ±VS = ±12V, TA =25°C, TESTA and TESTB = 0V
1. Guaranteed by design.
3.7 7 mA
3 6 mA
8.7 15 mA
7.4 14 mA
9 20 mA
8.6 18 mA
aSDhetat 4 Uomc.
HOLT INTEGRATED CIRCUITS
5
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