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L24W04 の電気的特性と機能

L24W04のメーカーはLink Smartです、この部品の機能は「(L24W04 / L24W08) Serial EEPROM」です。


製品の詳細 ( Datasheet PDF )

部品番号 L24W04
部品説明 (L24W04 / L24W08) Serial EEPROM
メーカ Link Smart
ロゴ Link Smart ロゴ 




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L24W04 Datasheet, L24W04 PDF,ピン配置, 機能
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L24W04/08
Serial EEPROM
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Data Sheet
Revision A
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S062A

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L24W04 pdf, ピン配列
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LinkSmart
L24W04/08
4K/8K 2-Wire (512x8/1,024x8)
3V~5.5V CMOS Serial EEPROM
PRELIMINARY
A
Features
z Operating voltage: 3V~5.5V
z Low power consumption
- Operation: 5mA max.
- Standby: 5µA max.
z Internal organization:
- 4K: 512x8
- 8K: 1,024x8
z 2-wire Serial Interface
z Write cycle time: 5ms max.
General Description
The L24W04/08 is a 4K/8K-bit serial read/write
non-volatile memory device using the CMOS
floating gate process. Its 4,096/8,192 bits of
memory are organized into 512/1,024 words and
each word is 8 bits. The device is optimized for
use in many industrial and commercial
z Automatic erase-before-write operation
z Partial page write allowed
z 16-byte Page Write Mode
z Write operation with built-in timer
z Hardware controlled write protection
z 40-year data retention
z 1,000,000 (106)rewrite cycles per word
z Commercial temperature range (0°C to +70°C)
z 8-pin SOP/DIP/TSSOP package
applications where low power and low voltage
operation are essential. Up to two L24W04/08
devices may be connected to the same 2-wire bus.
The L24W04/08 is guaranteed for 1,000,000 (106)
erase/write cycles and 40-year data retention.
Block Diagram
Pin Configurations
et4U.com
SCL
SDA
WP
I/O
Control
Logic
Memory
Control
Logic
A0~A2
Vcc
Vss
Address
Counter
HV Pump
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X
D EEPROM
E Array
C
Page Buf
YDEC
Sense AMP
R/W Control
A0 1
A1 2
A2 3
Vss 4
8 Vcc
7
W
P
6 SCL
5 SDA
Pin Description
Pin Name
A0~A2
SDA
SCL
WP
Vss
Vcc
I/O Description
I Address input
I/O Serial data
I Serial clock input
I Write protect
_ Negative power supply, ground
_ Positive power supply
Absolute Maximum Ratings
Operating Temperature (Commercial) ...................................................................... 0°C to 70°C
Storage Temperature ........................................................................................……. 50°C to 125°C
Applied Vcc Voltage with Respect to Vss .................................................................. 0.3V to 6.0V
Applied Voltage on any Pin with Respect to Vss ...................................……………… -0.3V to Vcc+0.3V
Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maximum
Ratings” may cause substantial damage to the device. Functional operation of this device at other
conditions beyond those listed in the specification is not implied and prolonged exposure to extreme
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L24W04 電子部品, 半導体
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LinkSmart
L24W04/08
4K/8K 2-Wire (512x8/1,024x8)
3V~5.5V CMOS Serial EEPROM
PRELIMINARY
A
et4U.com
and then clock in the first 8-bit data word. After
receiving the 8-bit data word, the EEPROM will
output a zero and the addressing device, such
as a microcontroller, must terminate the write
sequence with a stop condition. At this time the
EEPROM enters an internally-timed write cycle
to the nonvolatile memory. All inputs are
disabled during this write cycle and EEPROM
will not respond until write is complete (refer to
Byte write timing).
device is still busy implementing its write cycle,
then no ACK will be returned. The master can
send the next read/write command when the
ACK signal has finally been received.
Send Write Command
Send Stop Condition
to lnitiate Write Cycle
z Page write
The 4K/8K EEPROM is capable of a 16-byte
page write. A page write is initiated in the same
Send Start
way as a byte write, but the microcontroller
does not send a stop condition after the first
Send Cotroll Byte
data word is clocked in. Instead, after the
With R/W=0
EEPROM acknowledges the receipt of the first
data word, the microcontroller can transmit up
to 15 more data words. The EEPROM will
respond with a zero after each data word
(ACK=0)?
No
received. The microcontroller must terminate
the page write sequence with a stop condition
Yes
(refer to Page write timing).
The data word address lower four bits are
internally incremented following the recDeaipttaSofheet4U.com
Next Operation
Acknowledge polling flow
each data word. The higher data word address
bits are not incremented, retaining the memory
page row location.
z Write protect
The L24W04/08 has a write-protect function
z Acknowledge polling
To maximize bus throughput, one technique is
to allow the master to poll for an acknowledge
and programming will then be inhibited when
the WP pin is connected to Vcc. Under this
mode, the L24W04/08 is used as a serial ROM.
signal after the start condition and the control
byte for a write command have been sent. If the
B yte w rite tim ing
SDA S
S tart
D evice a ddre ss
A2 A1 A0
R /W
ACK
W ord address
ACK
DATA
P
A C K S top
P age w rite tim ing
D evice a ddre ss
W ord address
SDA S
S tart
ACK
ACK
DATA n
DATA n+1
ACK
DATA n+x
P
ACK
S top
z Read operations
The L24W04/08 supports three read operations,
namely, current address read, random address
read and sequential read. During read
operation execution, the read/ write select bit
should be set to “1”.
z Current address read
The internal data word address counter
maintains the last address accessed during the
last read or write operation, incremented by
one. This address stays valid between
operations as long as the chip power is
maintained. The addresses roll over during
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共有リンク

Link :


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L24W04

(L24W04 / L24W08) Serial EEPROM

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L24W08

(L24W04 / L24W08) Serial EEPROM

Link Smart
Link Smart


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