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PDF IS63WV1024BLL Data sheet ( Hoja de datos )

Número de pieza IS63WV1024BLL
Descripción (IS63WV1024BLL / IS64WV1024BLL) 128K x 8 HIGH-SPEED CMOS STATIC RAM
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IS63WV1024BLL
IS64WV1024BLL
ISSI®
128K x 8 HIGH-SPEED CMOS STATIC RAM
MAY 2006
FEATURES
DESCRIPTION
• High-speed access time:
12 ns: 3.3V + 10%
15 ns: 2.5V – 3.6V
• High-performance, low-power CMOS process
• CMOS Low Power Operation
50 mW (typical) operating current
25 µW (typical) standby current
• Multiple center power and ground pins for
greater noise immunity
• Easy memory expansion with CE and OE options
CE power-down
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
The ISSI IS63/64WV1024BLL is a very high-speed, low
power, 131,072-word by 8-bit CMOS static RAM. The
IS63/64WV1024BLL is fabricated using ISSI's
high-performance CMOS technology. This highly reliable
process coupled with innovative circuit design
techniques, yields higher performance and low power
consumption devices.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down to 25 µW (typical) with CMOS input levels.
The IS63/64WV1024BLL operates from a single VDD
power supply. The IS63/64WV1024BLL is available in
32-pin TSOP (Type II), 32-pin sTSOP (Type I), 48-Ball
miniBGA (6mm x 8mm), and 32-pin SOJ (300-mil)
packages.
• Packages available:
– 32-pin TSOP (Type II)
– 32-pin sTSOP (Type I)
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– 48-Ball miniBGA (6mm x 8mm)
– 32-pin 300-mil SOJ
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
A0-A16
VDD
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
128K X 8
MEMORY ARRAY
COLUMN I/O
CE
OE
WE
CONTROL
CIRCUIT
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
DataSheet4Uob.tcaion mthe latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
05/10/06
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IS63WV1024BLL pdf
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IS63WV1024BLL
IS64WV1024BLL
ISSI ®
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
Test Conditions
ICC VDD Dynamic Operating VDD = Max.,
Supply Current
IOUT = 0 mA, f = fMAX
ICC1 Operating Supply
Current
VDD = Max.,
Iout = 0mA, f = 0
ISB1 TTL Standby Current VDD = Max.,
(TTL Inputs)
VIN = VIH or VIL
CE VIH, f = 0
ISB2 CMOS Standby
VDD = Max.,
Current (CMOS Inputs) CE VDD – 0.2V,
VIN VDD – 0.2V, or
VIN 0.2V, f = 0
Options
COM.
IND.
AUTO
typ.(2)
COM.
IND.
AUTO
COM.
IND.
AUTO
COM.
IND.
AUTO
typ.(2)
-12 ns
Min. Max.
— 35
— 45
— 60
— 20
—5
—5
—5
—3
—4
—4
— 20
— 50
— 75
—6
-15 ns
Min. Max.
— 30
— 40
— 50
— 20
—5
—5
—5
—3
—4
—4
— 20
— 50
— 75
—6
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Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at VDD=2.5V, TA=25oC. Not 100% tested.
CAPACITANCE(1)
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Symbol Parameter
Conditions
Max.
Unit
CIN
COUT
Input Capacitance
Input/Output Capacitance
VIN = 0V
VOUT = 0V
6 pF
8 pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
Unit
mA
mA
mA
uA
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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
05/10/06
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IS63WV1024BLL arduino
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IS63WV1024BLL
IS64WV1024BLL
ISSI ®
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol Parameter
Test Condition
Operations
VDR
VDD for Data Retention
See Data Retention Waveform
IDR
Data Retention Current
VDD = 1.8V, CE VDD – 0.2V
COM.
IND.
AUTO.
tSDR Data Retention Setup Time See Data Retention Waveform
tRDR Recovery Time
See Data Retention Waveform
Note:
1. Typical values are measured at VDD = 2.5V, TA = 25OC. Not 100% tested.
Min.
1.8
0
tRC
Typ.(1)
6
6
6
Max.
3.6
20
50
75
DATA RETENTION WAVEFORM (CE Controlled)
Unit
V
µA
ns
ns
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VDD
VDR
CE
GND
tSDR Data Retention Mode
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CE VDD - 0.2V
tRDR
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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
05/10/06
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