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MN101D07G の電気的特性と機能

MN101D07GのメーカーはPanasonic Semiconductorです、この部品の機能は「MN101D07x」です。


製品の詳細 ( Datasheet PDF )

部品番号 MN101D07G
部品説明 MN101D07x
メーカ Panasonic Semiconductor
ロゴ Panasonic Semiconductor ロゴ 




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MN101D07G Datasheet, MN101D07G PDF,ピン配置, 機能
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MN101D07G, MN101D07H
Type
Internal ROM type
ROM (byte)
RAM (byte)
Package (Lead-free)
Minimum Instruction
Execution Time
MN101D07G
MN101D07H
Mask ROM
128K
160K
4K 5K
LQFP112-P-2020
[With main clock operated]
0.1397 µs (at 4.0 V to 5.5 V, 14.32 MHz)
71.5 µs (at 3.0 V to 5.5 V, 14.32 MHz internal frequency di Vision)
[When sub-clock operated]
61 µs (at 2.2 V to 5.5 V, 32.768 kHz)
MN101DF07Z
FLASH
224K
6K
0.1397 µs (at 4.0 V to 5.5 V,14.32 MHz)
71.5 µs (at 3.0 V to 5.5 V, 14.32 MHz
internal frequency di Vision)
61 µs (at 2.5 V to 5.5 V, 32.768 kHz)
Interrupts
RESET, Runaway, External 0 to 4, key input (P50 to P54), Timer 0 to 4, Timer 6, Timer 7, Capstan FG, Control, HSW,
Cylinder(Drum) FG, Servo V-sync, Synchronous output, OSD, XDS, Serial 0 to 2, A/D (common with PWM 4 reference frequency),
OSD V-sync
Timer Counter
Timer counter 0 : 16-bit × 1
(timer function, clock function [max. 2 s or max. 36 h at cascade-connecting with timer 6])
Clock source................ 1/2, (1/4,) 1/8, (1/16) of system clock frequency; overflow of timer counter 6; 1/512 of XI oscillation
clock or OSC oscillation clock frequency
Interrupt source ........... overflow of timer counter 0
Timer counter 1 : 16-bit × 1 (timer function, linear timer counter function)
Clock source................ 1/2, (1/4,) 1/8, (1/16) of system clock frequency; CTL signal
Interrupt source ........... overflow of timer counter 1
www.DataSheet4U.comTimer counter 2 : 16-bit × 1
(timer function, input capture
(DCTL specified edge), duty judgment of DCTL signal)
Clock source................ 1/2, (1/4,) 1/8, (1/16,) 1/12, (1/24) of system clock frequency
Interrupt source ........... overflow of timer counter 2; input of DCTL specified edge; underflow of timer 2 shift register 4-bit
counter; coincidence of timer 2 shift register with timer 2 shift register compare register
Timer counter 3 : 16-bit × 1
(timer function, detection of serial indexing, generation of remote control output carrier frequency)
Clock source................ 1/2, (1/4,) 1/8, (1/16) of system clock frequency; XI oscillation clock
Interrupt source ........... overflow of timer counter 3
Timer counter 4 : 16-bit × 1 (timer function, event count [P15 input], generation of serial transmission clock)
Clock source................ 1/8, (1/16) of system clock frequency; external clock input
Interrupt source ........... overflow of timer counter 4; coincidence of timer counter 4 with OCR4
Timer counter 5 : 19-bit × 1 (watchdog, stable oscillation waiting function)
Clock source................ system clock
Watchdog interrupt source... 1/216, 1/219 of timer counter 5 frequency
Clear by stable oscillation ... after 256 counts by timer counter 5 (218 counts of OSC oscillation clock)
Timer counter 6 : 16-bit × 1 (clock function [max. 2 s])
Clock source................ 1/512 of OSC oscillation clock frequency; XI oscillation clock; 1/4, (1/8,) 1/64, (1/128) of system clock
frequency
Interrupt source ........... 1/213, 1/214, 1/215 overflow of timer counter 6
Timer counter 7 : 8-bit × 1 or 4-bit × 2 (timer function, event count)
Clock source................ 1/4, (1/8,) 1/16, (1/32) of system clock frequency; external clock input
Interrupt source ........... overflow of timer counter 7 (although when 4-bit × 2, there is one interrupt vector. )
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MAD00030GEM
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MN101D07G pdf, ピン配列
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XDS
Built-in U.S. closed caption data slicer (optional 2 line data can be extracted.)
I/O Pins
I/O
Input
85 Common use : 71
2 Common use : 2
A/D converter
8-bit × 14-ch. (without S/H)
PWM
13-bit × 2-ch. (at repetition cycle 572 ms at 14.32 MHz),
10-bit × 2-ch. (at repetition cycle 71.5 ms at 14.32 MHz),
8-bit × 1-ch. (at repetition cycle 71.5 ms, 0.572 ms, 1.14 ms, 2.29 ms at 14.32 MHz)
ICR
18-bit × 6-ch.
OCR
16-bit × 2 (8-bit synchronous output; 4-bit 3-state synchronous output),
16-bit × 1 (weak electric field V-sync backup), 16-bit × 1 (Rec CTL)
Special Ports
Buzzer output; 3-state output VLP pin; remote control receive;
CTL signal input terminal; Capstan FG inputterminal; Sylinder(Durm) PG/FG input terminals;
HSW output terminal; Head Amp/Rortary control output terminals;
output of 1/2 OSC oscillation clock (2 V[p-p]); output of 1/4 OSC oscillation clock (1 V[p-p])
ROM Correction www.DataSheet4U.com
Correcting address designation : up to 3 addresses possible
Correction method : correction program being saved in internal RAM
Electrical Charactreistics (Supply current)
Parameter
Symbol
Condition
Operating supply current
Supply current at STOP
Supply current at HALT
IDD1
IDD2
IDD3
IDSP
IDHT0
IDHT1
14.32 MHz operation without load, VDD = 5 V
1/1024 of 14.32 MHz operation without load
VDD = 3.0 V
Stop of 14.32 MHz oscillation, VDD = 2.7 V
32 kHz oscillation operation without load
Stop of oscillation without load, VDD = 5 V, Ta = 55°C
14.32 MHz oscillation without load, VDD = 5 V
Stop of 14.32 MHz oscillation, VDD = 2.7 V
32 kHz oscillation operation without load
Limit
min typ max Unit
60 100 mA
2 5 mA
50 100 µA
10 µA
5 15 mA
5 20 µA
(Ta = 25°C±2°C , VSS = 0 V)
Electrical Charactreistics (A/D converter characteristics)
Parameter
Symbol
Condition
Conversion relative error
A/D Conversion Time
Analog Input Voltage
NLAD
tAD fosc = 14.32 MHz
Limit
Unit
min typ max
±3 LSB
8 µ
5V
(Ta = 25°C±2°C , VDD = 5.0 V , VSS = 0 V)
Development tools
In-circuit Emulator
PX-ICE101C/D + PX-PRB101D07-LQFP112-P-2020-M
MAD00030GEM
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共有リンク

Link :


部品番号部品説明メーカ
MN101D07

MN101 Series microcontroller

Matsushita Electric
Matsushita Electric
MN101D07G

MN101D07x

Panasonic Semiconductor
Panasonic Semiconductor
MN101D07H

MN101D07x

Panasonic Semiconductor
Panasonic Semiconductor


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