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PDF IS61C256AH Data sheet ( Hoja de datos )
| Número de pieza | IS61C256AH | |
| Descripción | 32K x 8 HIGH-SPEED CMOS STATIC RAM | |
| Fabricantes | Integrated Silicon Solution | |
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IS61C256AH
32K x 8 HIGH-SPEED CMOS STATIC RAM
ISSI®
MAY 1999
FEATURES
• High-speed access time: 10, 12, 15, 20, 25 ns
• Low active power: 400 mW (typical)
• Low standby power
— 250 µW (typical) CMOS standby
— 55 mW (typical) TTL standby
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 5V power supply
DESCRIPTION
The ISSI IS61C256AH is a very high-speed, low power,
32,768 word by 8-bit static RAMs. They are fabricated using
ISSI's high-performance CMOS technology. This highly reli-
able process coupled with innovative circuit design tech-
niques, yields access times as fast as 10 ns maximum.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down to
250 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Enable (CE ) input and an active LOW Output Enable (OE )
input. The active LOW Write Enable (WE ) controls both writing
and reading of the memory.
The IS61C256AH is pin compatible with other 32K x 8 SRAMs
and are available in 28-pin PDIP, SOJ, and TSOP (Type I)
packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A14
VCC
GND
I/O0-I/O7
DECODER
32K X 8
MEMORY ARRAY
I/O
DATA
CIRCUIT
COLUMN I/O
CE
CONTROL
OE CIRCUIT
WE
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ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
SR020-1O
05/24/99
1
1 page  
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IS61C256AH
AC WAVEFORMS
READ CYCLE NO. 1(1,2)
ADDRESS
DOUT
PREVIOUS DATA VALID
t OHA
t RC
t AA
ISSI®
t OHA
DATA VALID
READ1.eps
READ CYCLE NO. 2(1,3)
ADDRESS
OE
CE
DOUT
t LZCE
HIGH-Z
t RC
t AA
t DOE
t LZOE
t ACE
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE , CE = VIL.
3. Address is valid prior to or coincident with CE LOW transitions.
t OHA
t HZOE
t HZCE
DATA VALID
CE_RD2.eps
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Integrated Silicon Solution, Inc. — 1-800-379-4774
SR020-1O
05/24/99
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet IS61C256AH.PDF ] | |
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