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PDF IRU3039 Data sheet ( Hoja de datos )
| Número de pieza | IRU3039 | |
| Descripción | SYNCHRONOUS PWM CONTROLLER WITH OVER CURRENT PROTECTION | |
| Fabricantes | International Rectifier | |
| Logotipo |  |
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Data Sheet No. PD94649
IRU3039
SYNCHRONOUS PWM CONTROLLER
WITH OVER CURRENT PROTECTION
FEATURES
Current Limit using Lower MOSFET Sensing
Using the 6V internal regulator for charge pump
circuit allows single supply operation up to 18V
Programmable Switching Frequency up to 400KHz
Soft-Start Function
0.8V Precision Reference Voltage Available
Uncommitted Error Amplifier Available for DDR
Voltage Tracking Applications
Stable with Ceramic Capacitor
APPLICATIONS
DDR Memory VDDQ/VTT Applications
Graphic Card
Hard Disk Drive
Netcom on-board DC to DC regulator application
Output voltage as low as 0.8V
Low Cost On-Board DC to DC
DESCRIPTION
The IRU3039 controller IC is designed to provide a syn-
chronous Buck regulator and is targeted for applications
where the cost and size is critical. The IRU3039 oper-
ates with a single input supply up to 18V. The output
voltage can be programmed as low as 0.8V for low volt-
age applications. Selectable current limit is provided to
tailor to external MOSFET’s on-resistance for optimum
cost and performance. The IRU3039 features an uncom-
mitted error amplifier for tracking output voltage and is
capable of sourcing or sinking current for applications
such as DDR bus termination.
This device features a programmable switching frequency
set from 200KHz to 400KHz, under-voltage lockout for
both Vcc and Vc supplies, an external programmable
soft-start function as well as output under-voltage detec-
tion that latches off the device when an output short is
detected.
TYPICAL APPLICATION
C3
1uF
C7
0.1uF
C11
Optional
C9
1uF
D1
Vcc VOUT2
SS / SD
Vc
U1 HDrv
IRU3039
VP
VREF
OCSet
R2
5.76K
C4
1uF
D2
Rt
Comp
LDrv
C8
5600pF
R1
14K
Gnd
Fb
PGnd
C5
0.1uF
R4
1K
L1
1uH
C2
3x 15uF
25V
Q1
IRF7466
Q2
IRF7458
L2
4.7uH
R3
3.16K
18V
C1
15uF
3.3V @ 8A
C6
2x 330uF
40mV
Figure 1 - Typical application of IRU3039.
PACKAGE ORDER INFORMATION
TA (°C)
0 To 70
DEVICE
IRU3039CH
PACKAGE
20-Pin MLPQ 5x5 (H)
Rev. 1.0
06/06/03
www.irf.com
1
www.DataSheet4U.com
1 page  
IRU3039
THEORY OF OPERATION
Introduction
The IRU3039 is a fixed frequency, voltage mode syn-
chronous controller and consists of a precision refer-
ence voltage, an uncommitted error amplifier, an internal
oscillator, a PWM comparator, an internal regulator, a
comparator for current limit, gate drivers, soft-start and
shutdown circuits (see Block Diagram).
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier; this is
the amplified error signal from the sensed output voltage
and the voltage on non-inverting input of error amplifier(VP).
This voltage is compared to a fixed frequency linear
sawtooth ramp and generates fixed frequency pulses of
variable duty-cycle, which drives the two N-channel ex-
ternal MOSFETs.
The timing of the IC is provided through an internal oscil-
lator circuit which uses on-chip capacitor. The oscilla-
tion frequency is programmable between 200KHz to
400KHz by using an external resistor. Figure 14 shows
switching frequency vs. external resistor (Rt).
20uA
SS/SD
3V
64uA
Max
HDrv
POR
Comp
0.8V
Fb
25K
25K
Error Amp
LDrv
0.4V
6 4 u A325K=1.6V
When SS=0
Feeback
POR
UVLO Comp
Figure 3 - Soft-start circuit for IRU3039.
The magnitude of this current is inversely proportional to
the voltage at soft-start pin.
Soft-Start
The IRU3039 has a programmable soft-start to control
the output voltage rise and limit the current surge at the
start-up. To ensure correct start-up, the soft-start se-
quence initiates when the Vc and Vcc rise above their
threshold (3.4V and 4.4V respectively) and generates
the Power On Reset (POR) signal. Soft-start function
operates by sourcing an internal current to charge an
external capacitor to about 3V. Initially, the soft-start func-
tion clamps the E/A’s output of the PWM converter and
disables the short circuit protection. During the power
up, the output starts at zero and voltage at Fb is below
0.4V. The feedback UVLO is disabled during this time
by injecting a current (64mA) into the Fb. This generates
a voltage about 1.6V (64mA325K) across the negative
input of E/A and positive input of the feedback UVLO
comparator (see Figure 3).
The 20mA current source starts to charge up the exter-
nal capacitor. In the mean time, the soft-start voltage
ramps up, the current flowing into Fb pin starts to de-
crease linearly and so does the voltage at the positive
pin of feedback UVLO comparator and the voltage nega-
tive input of E/A.
When the soft-start capacitor is around 1V, the current
flowing into the Fb pin is approximately 32mA. The volt-
age at the positive input of the E/A is approximately:
32mA325K = 0.8V
The E/A will start to operate and the output voltage starts
to increase. As the soft-start capacitor voltage contin-
ues to go up, the current flowing into the Fb pin will keep
decreasing. Because the voltage at pin of E/A is regu-
lated to reference voltage 0.8V, the voltage at the Fb is:
VFB = 0.8-25K3(Injected Current)
Rev. 1.0
06/06/03
www.irf.com
5
5 Page 
IRU3039
The IRU3039’s error amplifier is a differential-input
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback,
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 12.
Note that this method requires that the output capacitor
should have enough ESR to satisfy stability requirements.
In general, the output capacitor’s ESR generates a zero
typically at 5KHz to 50KHz which is essential for an
acceptable phase margin.
The ESR zero of the output capacitor expressed as fol-
lows:
FESR
=
1
2p3ESR3Co
---(14)
VOUT
R6 Fb
R5
Vp=VREF
Comp
E/A Ve
C9
R4
Gain(dB)
H(s) dB
First select the desired zero-crossover frequency (Fo):
Fo > FESR and FO [ (1/5 ~ 1/10)3fS
Use the following equation to calculate R4:
R4
=
VOSC
VIN
3Fo3FLCF2ESR
3
R5 + R63
R5
1
gm
---(18)
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Fo = Crossover Frequency
FESR = Zero Frequency of the Output Capacitor
FLC = Resonant Frequency of the Output Filter
R5 and R6 = Resistor Dividers for Output Voltage
Programming
gm = Error Amplifier Transconductance
For:
VIN = 18V
VOSC = 3.3V
Fo = 20KHz
FESR = 12KHz
FLC = 2.8KHz
R5 = 1K
R6 = 3.16K
gm = 700mmho
This results to R4=12.08K
Choose R4=14K
To cancel one of the LC filter poles, place the zero be-
fore the LC filter resonant frequency pole:
FZ ≅ 75%FLC
FZ ≅ 0.753
2p
For:
Lo = 4.7mH
Co = 660mF
1
LO 3 CO
---(19)
FZ = 2.1KHz
R4 = 14K
FZ Frequency
Figure 12 - Compensation network without local
feedback and its asymptotic gain plot.
The transfer function (Ve / VOUT) is given by:
( )H(s) =
gm3
R6
R5
+ R5
3
1 + sR4C9
sC9
---(15)
The (s) indicates that the transfer function varies as a
function of frequency. This configuration introduces a gain
and zero, expressed by:
|H(s=j32p3FO)|
=
gm3
R5
R63R5
3R4
---(16)
FZ
=
1
2p3R43C9
---(17)
|H(s)| is the gain at zero cross frequency.
Using equations (17) and (19) to calculate C9, we get:
C9 ≅ 5300pF; Choose C9=5600pF
One more capacitor is sometimes added in parallel with
C9 and R4. This introduces one more pole which is mainly
used to suppress the switching noise. The additional
pole is given by:
1
FP =
2p3R43
C93CPOLE
C9 + CPOLE
The pole sets to one half of switching frequency which
results in the capacitor CPOLE:
11
CPOLE =
p3R43fS -
1
≅ p3R43fS
C9
for FP <<
fS
2
Rev. 1.0
06/06/03
www.irf.com
11
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| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet IRU3039.PDF ] | |
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