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PDF AK7746 Data sheet ( Hoja de datos )
| Número de pieza | AK7746 | |
| Descripción | Audio DSP with 5-channel 24-bit ADC and Input Mux | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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[ASAHI KASEI]
[AK7746]
AK7746
Audio DSP with 5-channel 24-bit ADC and Input Mux
1. General Description
The AK7746 is a highly integrated audio processor, including 5 A/D channels, an input mux that can select 2 stereo pairs
from 8 stereo inputs, and an on-chip DSP. High quality analog performance is provided by the ADC’s achieving 98dB
(48kHz) dynamic range. The A/D supports sampling frequencies from 8kHz to 96kHz. The AK7746 includes 72kbits of
SRAM for audio delay that is suitable for simulated surround functions and speaker compensation. The programmable
DSP allows up to 4608 execution lines per audio sample cycle at 8kHz, 768 lines at 48kHz, or 384 lines at 96kHz with
multiple functions per line. The AK7746 can be used to implement complete sound field control, such as echo, 3D,
parametric equalization, etc. It is packaged in a 64-lead LQFP.
2. Features
DSP:
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Word length:
24-bit (Data RAM)
Instruction cycle time:
27ns (768fs, fs=48kHz )
Multiplier:
24 x 16 → 40-bit
Divider:
24 / 24 → 16-bit or 24-bit
ALU:
34-bit arithmetic operation (Overflow margin: 4bit)
24-bit arithmetic and logic operation
Shift+Register:
1, 2, 3, 4, 6, 8 and 15 bits shifted left
1, 2, 3, 4, 8 and 15 bits shifted right
(Other numbers in parentheses are restricted.
Provided with indirect shift function)
Program RAM:
768 x 32-bit
Coefficient RAM:
1024 x 16-bit
Data RAM:
256 x 24-bit
Offset RAM:
48 x 13-bit
(6144 x 12-bit / 3072 x 24-bit / 4096 x 12-bit + 1024 x 24-bit )
Internal Memory:
72kbit SRAM
Sampling frequency:
8kHz to 96kHz
Serial interface port for micro-controller
Master clock:
768fs@48kHz ( generated by PLL from 256fs or 384fs )
Master/Slave operation
Serial signal input port ( 8(10) ch ):16/20/24-bit : Output port ( 8ch + 4ch ): 24-bit
ADC: 4 channels (2 channels 2 sets )
- 24-bit 64 x Over-sampling delta sigma
- Sampling frequency:
8kHz to 96kHz
- DR:
98dBA ( fs=48 kHz Full-differential Input )
- S/N :
98dBA ( fs=48 kHz Full-differential Input )
- S/(N+D) :
91dB ( fs= 48 kHz Full-differential Input )
- Digital HPF (fc = 1Hz)
- Single-ended or Full-differential Input
ADC: Monaural 1 channel
- 24-bit 64x Over-sampling delta sigma
- Sampling frequency:
8kHz to 96kHz
- DR:
97dBA ( fs=48 kHz )
- S/N :
97dBA ( fs=48 kHz )
- S/(N+D) :
91dB ( fs= 48 kHz )
Other
- External Jump pin:
3(maximum)
- CRC error check function
- LRCLK and BITCLK input and output for slave mode
- Power supply:
+3.3V±0.3V
- Operating temperature range:
- Package:
-40°C~85°C
64pin LQFP (0.5mm pitch)
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-1-
2004/12
1 page  
[ASAHI KASEI]
[AK7746]
(2) Pin function
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
Pin name
AINR5
AINL5
AINR6
AINL6
AINR7
AINL7
AINR8
AINL8
BVSS
DVSS
DVDD
CS
I/O Function
I ADC1 or ADC2 Rch single ended analog input 5
I ADC1 or ADC2 Lch single ended analog input 5
I ADC1 or ADC2 Rch single ended analog input 6
I ADC1 or ADC2 Lch single ended analog input 6
I ADC1 or ADC2 Rch single ended analog input 7
I ADC1 or ADC2 Lch single ended analog input 7
I ADC1 or ADC2 Rch single ended analog input 8
I ADC1 or ADC2 Lch single ended analog input 8
- Analog ground (Silicon base ground level)
Connect with AVSS pin
- Digital Ground 0.0V
- Digital power supply 3.3V(typ)
Chip select pin for Microcomputer interface. (Internal pull-down)
I Normaly leave OPEN or connect with DVSS.
CS =”H” : SI can not input, SO,RDY,DRDY = Hi-Z.
Classification
Analog input
Analog Power supply
Digital Power supply
Microcomputer
Interface
Write request pin for Microcomputer interface.
13 RQ I RQ =”L” : Microcomputer interface enable.
For run-time data read out: RQ =”H”.
When Microcomputer interface is not used or during initial reset, leave
RQ =”H”.
Serial data input and serial data output control pin for Microcomputer
14 SI I interface.
When SI is not used, leave SI=”L”.
15 SCLK I Serial data clock pin for Microcomputer interface.
When SCLK is not used, leave SCLK=”H”.
16 SO O Serial data output pin for Microcomputer interface.
CS =”H” : SO = Hi-Z.
17
RDY
O Data write ready output pin for Microcomputer interface.
CS =”H” : RDY = Hi-Z.
18
DRDY
O Output data ready pin for Microcomputer interface.
CS =”H” : DRDY = Hi-Z.
19
INIT_RESET
I Reset pin ( for initialization )
Reset
Used for initialization of the AK7746. When changing CKS1 or CKS0 and
changing XTI input frequency, this pin setting is necessary.
20 S_RESET I System Reset pin
21 SDIN4/JX2 I DSP serial data input pin / External condition jump pin
Digital section
(Internal pull-down )
Serial input data /
* Compatible with MSB justified 24 bits / LSB justified 24,20 and 16 bits Conditional input
* It can change its function as a conditional jump pin JX2 by control register
setting (JX2_E).
22 SDIN3/JX1 I DSP serial data input pin / External condition jump pin
Digital section
(Internal pull-down )
Serial input data /
* Compatible with MSB justified 24 bits / LSB justified 24,20 and 16 bits Conditional input
* It can change its function as a conditional jump pin JX1 by control register
setting (JX1_E).
[MS0369-E00]
-5-
2004/12
5 Page 
[ASAHI KASEI]
(2) DC Characteristics
(VDD=AVDD=DVDD=3.0~3.6V, Ta=25°C)
Parameter
High level input voltage
Low level input voltage
High level output voltage Iout=-100µA
Low level output voltage Iout=100µA
Input leak current
Note 1)
Input leak current (pull-down) Note 2)
Input leak current (XTI pin)
Symbol
VIH
VIL
VOH
VOL
Iin
Iid
Iix
min
80% of VDD
VDD-0.5
typ
22
50
Note 1) The pull-down pins and XTI pin are not included.
Note 2) The pull-down pins are: CS , SDIN4/JX2, SDIN3/JX1, SDIN2, SDIN1/JX0, TESTI
[AK7746]
max
20% of VDD
0.5
±10
Unit
V
V
V
V
µA
µA
µA
Note:
Regarding the input/output levels in the text, the low level will be represented as "L" or 0, and the high level as "H" or 1. In
principle, "0" and "1" will be used to represent the bus (serial/parallel) such as registers.
(3) Current Consumption
(AVDD=DVDD=3.0V~3.6V, Ta=25°C; master clock (XTI)=18.432MHz=384fs[fs=48kHz];
PLL is in active mode. )
Parameter
Power supply current
1)Normal Speed
a) AVDD
b) DVDD
c) total(a+b)
2)Double Speed
a) AVDD
b) DVDD
c) total(a+b)
Note 1)
min
Note 2)
typ
40
45
85
42
53
95
3) INIT_RESET ="L"(reference)
Note 3)
2
max
60
90
150
Unit
mA
mA
mA
mA
mA
mA
mA
Note 1) Varies slightly different according to the system frequency and contents of the DSP program.
Note 2) Max value is “Double Speed” mode.
Note 3) This is a reference value when using the crystal oscillator. Because most of the power current at the initial reset state is in
the oscillator section, the value may vary slightly according to the type of crystal oscillators and external circuits.
This is a reference value only.
[MS0369-E00]
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2004/12
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK7746.PDF ] | |
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