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PDF STE100N20 Data sheet ( Hoja de datos )
| Número de pieza | STE100N20 | |
| Descripción | N-CHANNEL ENHANCEMENT MODE Power MOS Transistor | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de STE100N20 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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STE100N20
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
TYPE
STE100N20
VDSS
200 V
R DS( on)
< 0.021 Ω
ID
100 A
s HIGH CURRENT POWER MODULE
s AVALANCHE RUGGED TECHNOLOGY
(SEE STH33N20FI FOR RATING)
s VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
s EASY TO MOUNT
s SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
s EXTREMELY LOW Rth JUNCTION TO CASE
s VERY LOW DRAIN TO CASE CAPACITANCE
s VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
s ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
INDUSTRIAL APPLICATIONS:
s SMPS & UPS
s MOTOR CONTROL
s WELDING EQUIPMENT
s OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
1
2
4
3
ISOTOP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
P ar amete r
VD S Drain-Source Voltage (VGS = 0)
VDG R Drain-Gate Voltage (RGS = 20 kΩ)
VGS Gate-Source Voltage
ID Drain Current (continuous) at T c = 25 oC
ID Drain Current (continuous) at T c = 100 oC
IDM(•) Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 oC
Derating Factor
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
VISO Insulation Withstand Voltage (AC-RMS)
(•) Pulse width limited by safe operating area
July 1993
Value
200
200
± 20
100
65
400
450
3.6
-55 to 150
150
2500
Unit
V
V
V
A
A
A
W
W /o C
oC
oC
V
1/8
1 page  
Capacitance Variations
STE100N20
Normalized Gate Threshold Voltage vs
Temperature
Normalized Breakdown Voltage vs Temperature
Normalized On Resistance vs Temperature
Turn-on Current Slope
Turn-off Drain-source Voltage Slope
5/8
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet STE100N20.PDF ] | |
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