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STE48NM50 の電気的特性と機能

STE48NM50のメーカーはST Microelectronicsです、この部品の機能は「N-CHANNEL Power MOSFET」です。


製品の詳細 ( Datasheet PDF )

部品番号 STE48NM50
部品説明 N-CHANNEL Power MOSFET
メーカ ST Microelectronics
ロゴ ST Microelectronics ロゴ 




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STE48NM50 Datasheet, STE48NM50 PDF,ピン配置, 機能
STE48NM50
N-CHANNEL 550V @ Tjmax - 0.08- 48A ISOTOP
MDmesh™ MOSFET
Table 1: General Features
TYPE
VDSS
(@Tjmax)
RDS(on)
ID
STE48NM50
550V
< 0.1
48 A
s TYPICAL RDS(on) = 0.08
s HIGH dv/dt AND AVALANCHE CAPABILITIES
s 100% AVALANCHE TESTED
s LOW INPUT CAPACITANCE AND GATE
CHARGE
s LOW GATE INPUT RESISTANCE
s TIGHT PROCESS CONTROL AND HIGH
MANUFACTURING YIELDS
DESCRIPTION
The MDmesh™ is a new revolutionary MOSFET
technology that associates the Multiple Drain pro-
cess with the Company’s PowerMESH™ horizon-
tal layout. The resulting product has an
outstanding low on-resistance, impressively high
dv/dt and excellent avalanche characteristics. The
adoption of the Company’s proprietary strip tech-
nique yields overall dynamic performance that is
significantly better than that of similar competi-
tion’s products.
Figure 1: Package
ISOTOP
Figure 2: Internal Schematic Diagram
APPLICATIONS
The MDmesh™ family is very suitable for increas-
ing power density of high voltage converters allow-
ing system miniaturization and higher efficiencies.
Table 2: Order Codes
SALES TYPE
STE48NM50
MARKING
E48NM50
PACKAGE
ISOTOP
PACKAGING
TUBE
March 2005
www.DataSheet4U.com
Rev. 2
1/9

1 Page





STE48NM50 pdf, ピン配列
STE48NM50
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 7: Dynamic
Symbol
Parameter
Test Conditions
gfs (1)
Forward Transconductance VDS > ID(on) x RDS(on)max, ID = 24A
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25V, f = 1 MHz, VGS = 0
RG Gate Input Resistance
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
td(on)
tr
td(off)
tf
tc
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Cross-over Time
VDD = 250V, ID = 24 A
RG = 4.7VGS = 10 V
(see Figure 14)
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VDD = 400V, ID = 48 A,
VGS = 10V
(see Figure 18)
Min.
Typ.
20
3700
610
80
Max.
Unit
S
pF
pF
pF
1.7
40 ns
35 ns
18 ns
23 ns
44 ns
87 117 nC
23 nC
42 nC
Table 8: Source Drain Diode
Symbol
Parameter
Test Conditions
ISD Source-drain Current
ISDM (2) Source-drain Current (pulsed)
VSD (1) Forward On Voltage
ISD = 48 A, VGS = 0
trr Reverse Recovery Time
ISD = 40 A, di/dt = 100 A/µs,
Qrr Reverse Recovery Charge VDD = 100 V, Tj = 25°C
Irrm Reverse Recovery Current (see Figure 16)
trr Reverse Recovery Time
ISD = 40 A, di/dt = 100 A/µs,
Qrr Reverse Recovery Charge VDD = 100 V, Tj = 150°C
Irrm Reverse Recovery Current (see Figure 16)
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Min.
Typ.
520
7.8
30
680
11.2
33
Max.
48
192
1.5
Unit
A
A
V
ns
µC
A
ns
µC
A
3/9


3Pages


STE48NM50 電子部品, 半導体
STE48NM50
Figure 14: Unclamped Inductive Load Test Cir-
cuit
Figure 17: Unclamped Inductive Wafeform
Figure 15: Switching Times Test Circuit For
Resistive Load
Figure 18: Gate Charge Test Circuit
Figure 16: Test Circuit For Inductive Load
Switching and Diode Recovery Times
6/9

6 Page



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部品番号部品説明メーカ
STE48NM50

N-CHANNEL Power MOSFET

ST Microelectronics
ST Microelectronics


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