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IS62WV5128CLL の電気的特性と機能

IS62WV5128CLLのメーカーはIntegrated Silicon Solutionです、この部品の機能は「512K x 16 Low Voltage / Ultra Low Power CMOS SRAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 IS62WV5128CLL
部品説明 512K x 16 Low Voltage / Ultra Low Power CMOS SRAM
メーカ Integrated Silicon Solution
ロゴ Integrated Silicon Solution ロゴ 




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IS62WV5128CLL Datasheet, IS62WV5128CLL PDF,ピン配置, 機能
IS62WV5128CLL
ISSI®
512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
MARCH 2003
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
– 1.5 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
– 2.5V--3.6V VDD (62WV5128CLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
• 2 CS Options Available
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ISSI IS62WV5128CLL are high-speed, 4M bit static
RAMs organized as 512K words by 8 bits. It is fabricated
using ISSI's high-performance CMOS technology. This
highly reliable process coupled with innovative circuit
design techniques, yields high-performance and low power
consumption devices.
When CS1 is HIGH (deselected) or when CS2 is LOW
(deselected) the device assumes a standby mode at
which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV5128CLL is packaged in the JEDEC standard
36-pin mini BGA (6mm x 8mm). 36-pin mini BGA is
available in both 1CS and 2CS options.
A0-A18
VDD
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
CS2
CS1
OE
WE
CONTROL
CIRCUIT
512K x 8
MEMORY ARRAY
COLUMN I/O
www.DataSheet4U.com
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00B
www0.3D/13/03ataSheet4U.com
1

1 Page





IS62WV5128CLL pdf, ピン配列
IS62WV5128CLL
OPERATING RANGE (VDD)
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
VDD
2.5V - 3.6V
2.5V - 3.6V
ISSI ®
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Parameter
Value
Unit
VTERM
Terminal Voltage with Respect to GND
–0.3 to VDD+0.5
V
VDD VDD Related to GND
–0.2 to +4.2
V
TSTG
Storage Temperature
–55 to +125
°C
PT Power Dissipation
0.6 W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
VDD
VOH
Output HIGH Voltage
IOH = -1 mA
2.5-3.6V
VOL
Output LOW Voltage
IOL = 2.1 mA
2.5-3.6V
VIH Input HIGH Voltage
2.5-3.6V
VIL(1)
Input LOW Voltage
2.5-3.6V
ILI Input Leakage
GND VIN VDD
ILO Output Leakage
GND VOUT VDD, Outputs Disabled
Notes:
1. VIL (min.) = –1.0V for pulse width less than 10 ns.
Min.
2.2
2.2
–0.2
–1
–1
Max.
0.4
VDD + 0.3
0.6
1
1
Unit
V
V
V
V
µA
µA
TRUTH TABLE
Mode
Not Selected
(Power-down)
Output Disable
Read
Write
WE
X
X
H
H
L
CS1
H
X
L
L
L
CS2 OE
XX
LX
HH
HL
HX
I/O Operation
High-Z
High-Z
High-Z
DOUT
DIN
VDD Current
ISB1, ISB2
ISB1, ISB2
Icc
Icc
Icc
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00B
03/13/03
3


3Pages


IS62WV5128CLL 電子部品, 半導体
IS62WV5128CLL
ISSI ®
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH)
ADDRESS
DOUT
tRC
PREVIOUS DATA VALID
tOHA
tAA
tOHA
DATA VALID
AC WAVEFORMS
READ CYCLE NO. 2(1,3) (CS1, CS2, OE Controlled)
ADDRESS
OE
CS1
CS2
DOUT
tRC
tAA
tDOE
tLZOE
tACS1/tACS2
tLZCS1/
tLZCS2
HIGH-Z
tOHA
tHZOE
tHZCS
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CS1= VIL. CS2=WE=VIH.
3. Address is valid prior to or coincident with CS1 LOW and CS2 HIGH transition.
6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00B
03/13/03

6 Page



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部品番号部品説明メーカ
IS62WV5128CLL

512K x 16 Low Voltage / Ultra Low Power CMOS SRAM

Integrated Silicon Solution
Integrated Silicon Solution


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