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ST93C47C の電気的特性と機能

ST93C47CのメーカーはST Microelectronicsです、この部品の機能は「(ST93C4xx) 1K 64 x 16 or 128 x 8 SERIAL MICROWIRE EEPROM」です。


製品の詳細 ( Datasheet PDF )

部品番号 ST93C47C
部品説明 (ST93C4xx) 1K 64 x 16 or 128 x 8 SERIAL MICROWIRE EEPROM
メーカ ST Microelectronics
ロゴ ST Microelectronics ロゴ 




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ST93C47C Datasheet, ST93C47C PDF,ピン配置, 機能
ST93C46A,46C,46T
ST93C47C,47T
1K (64 x 16 or 128 x 8) SERIAL MICROWIRE EEPROM
NOT FOR NEW DESIGN
1 MILLION ERASE/WRITE CYCLES, with
40 YEARS DATA RETENTION
DUAL ORGANIZATION: 64 x 16 or 128 x 8
BYTE/WORD and ENTIRE MEMORY
PROGRAMMING INSTRUCTIONS
SELF-TIMED PROGRAMMING CYCLE with
mAUTO-ERASE
oREADY/BUSY SIGNAL DURING
PROGRAMMING
.cSINGLE SUPPLY VOLTAGE:
– 4.5V to 5.5V for ST93C46 version
– 3V to 5.5V for ST93C47 version
USEQUENTIAL READ OPERATION
t45ms TYPICAL PROGRAMMING TIME
ENHANCED ESD/LATCH UP
ePERFORMANCE for ”C” VERSION
ST93C46A, ST93C46C, ST93C46T,
eST93C47C, ST93C47T are replaced by the
M93C46
8
1
PSDIP8 (B)
0.4mm Frame
8
1
SO8 (M)
150mil Width
Figure 1. Logic Diagram
hDESCRIPTION
SThis specification covers a range of 1K bit serial
taEEPROM products, the ST93C46A,46C,46T
specified at 5V±10% and the ST93C47C,47T
specified at 3V to 5.5V.
aIn the text, products are referred to as ST93C46.
The ST93C46 is a 1K bit Electrically Erasable
.DProgrammableMemory (EEPROM) fabricated with
SGS-THOMSON’s High EnduranceSingle Polysili-
con CMOS technology. The memory is accessed
wthrough a serial input (D) and output (Q).
wTable 1. Signal Names
wS Chip Select Input
D
C
S
ORG
VCC
ST93C46
ST93C47
Q
D
Q
C
ORG
VCC
VSS
Serial Data Input
Serial Data Output
Serial Clock
Organisation Select
Supply Voltage
Ground
June 1997
This is information on a product still in production bu t not recommended for new de signs.
wwVSwS .DataSheAIe008t714C 1U/13.com

1 Page





ST93C47C pdf, ピン配列
ST93C46A/46C/46T, ST93C47C/47T
AC MEASUREMENT CONDITIONS
Input Rise and Fall Times
Input Pulse Voltages
Input Timing Reference Voltages
Output Timing Reference Voltages
20ns
0.4V to 2.4V
1V to 2.0V
0.8V to 2.0V
Note that Output Hi-Z is defined as the point where data
is no longer driven.
Figure 3. AC Testing Input Output Waveforms
2.4V
0.4V
2V
1V
INPUT
OUTPUT
2.0V
0.8V
AI00815
Table 3. Capacitance (1)
(TA = 25 °C, f = 1 MHz )
Symbol
Parameter
CIN Input Capacitance
COUT
Output Capacitance
Note: 1. Sampled only, not 100% tested.
Test Condition
VIN = 0V
VOUT = 0V
Min
Max
Unit
5 pF
5 pF
Table 4. DC Characteristics
(TA = 0 to 70°C or –40 to 85°C; VCC = 4.5V to 5.5V or 3V to 5.5V)
Symbol
Parameter
Test Condition
ILI Input Leakage Current
0V VIN VCC
ILO Output Leakage Current
0V VOUT VCC,
Q in Hi-Z
Supply Current (TTL Inputs)
ICC
Supply Current (CMOS Inputs)
S = VIH, f = 1 MHz
S = VIH, f = 1 MHz
ICC1 Supply Current (Standby)
S = VSS, C = VSS,
ORG = VSS or VCC
VIL Input Low Voltage (D, C, S)
VCC = 5V ± 10%
3V VCC 4.5V
VIH Input High Voltage (D, C, S)
VCC = 5V ± 10%
3V VCC 4.5V
VOL Output Low Voltage
IOL = 2.1mA
IOL = 10 µA
VOH Output High Voltage
IOH = –400µA
IOH = –10µA
Min
–0.3
–0.3
2
0.8 VCC
2.4
VCC – 0.2
Max
±2.5
±2.5
3
2
50
0.8
0.2 VCC
VCC + 1
VCC + 1
0.4
0.2
Unit
µA
µA
mA
mA
µA
V
V
V
V
V
V
V
V
3/13


3Pages


ST93C47C 電子部品, 半導体
ST93C46A/46C/46T, ST93C47C/47T
MEMORY ORGANIZATION
The ST93C46 is organised as 128 bytes x 8 bits or
64 words x 16 bits. If the ORG input is left uncon-
nected (or connected to VCC) the x16 organization
is selected, when ORG is connected to Ground
(VSS) the x8 organization is selected. When the
ST93C46 is in standby mode, the ORG input
should be unconnected or set to either VSS or VCC
in order to get minimum power consumption. Any
voltage between VSS and VCC applied to ORG may
increase the standby current value.
POWER-ON DATA PROTECTION
During power-up, A Power On Reset sequence is
run in order to reset all internal programming cir-
cuitry and the device is set in the Write Disable
mode. When VCC reaches its functional value, the
device is properlyreset (in the Write Disable mode)
and is ready to decode and execute an incoming
instruction.
INSTRUCTIONS
The ST93C46 has seven instructions, as shown in
Table 6. Each instruction is preceded by the rising
edge of the signal applied on the S input (assuming
that the clock C is low), followed by a ’1’ read on D
input during the rising edge of the clock C. The
op-codes of the instructions are made up of the 2
followingbits. Some instructions useonly these first
two bits, others use also the first two bits of the
address to define the op-code. The op-code is
followed by an address for the byte/word which is
made up of six bits for the x16 organization or
seven bits for the x8 organization.
The ST93C46 is fabricated in CMOS technology
and is therefore able to run from zero Hz (static
input signals) up to the maximum ratings (specified
in Table 5).
Read
The Read instruction (READ) outputs serial data
on the Data Output (Q). When a READ instruction
is received, the instruction and address are de-
coded and the data from the memory is transferred
into an output shiftregister. A dummy ’0’ bit is output
first followed by the 8 bit byte or the 16 bit word with
the MSB first. Output data changes are triggered
by the Low to High transition of the Clock (C). The
ST93C46 will automatically increment the address
and will clock out the next byte/word as long as the
Chip Select input (S) is held High. In this case the
dummy ’0’ bit is NOT output between bytes/words
and a continuous stream of data can be read.
Erase/Write Enable and Disable
The Erase/Write Enable instruction (EWEN)
authorizesthe following Erase/Write instructions to
be executed, the Erase/Write Disable instruction
(EWDS) freezes the execution of the following
Erase/Write instructions. When power is first ap-
plied to the ST93C46, Erase/Write is inhibited.
When the EWEN instruction is executed, Write
instructions remain enabled until an Erase/Write
Disable instruction (EWDS) is executed or VCC falls
below the power-on reset threshold. To protect the
memory contents from accidental corruption, it is
advisable to issue the EWDS instruction after every
write cycle.
The READ instruction is not affected by the EWEN
or EWDS instructions.
Table 6. Instruction Set
Instruction
Description
READ Read Data from Memory
WRITE Write Data to Memory
EWEN Erase/Write Enable
EWDS Erase/Write Disable
ERASE Erase Byte or Word
ERAL
Erase All Memory
WRAL Write All Memory with same Data
Note: X = don’t care bit.
Op-Code
10
01
00
00
11
00
00
x8 Org
Address
(ORG = 0)
A6-A0
A6-A0
11XXXXX
00XXXXX
A6-A0
10XXXXX
01XXXXX
Data
Q7-Q0
D7-D0
D7-D0
x16 Org
Address
(ORG = 1)
A5-A0
A5-A0
11XXXX
00XXXX
A5-A0
10XXXX
01XXXX
Data
Q15-Q0
D15-D0
D15-D0
6/13

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部品番号部品説明メーカ
ST93C47C

(ST93C4xx) 1K 64 x 16 or 128 x 8 SERIAL MICROWIRE EEPROM

ST Microelectronics
ST Microelectronics
ST93C47T

(ST93C4xx) 1K 64 x 16 or 128 x 8 SERIAL MICROWIRE EEPROM

ST Microelectronics
ST Microelectronics


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