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PDF TMP88CS38BNG Data sheet ( Hoja de datos )
| Número de pieza | TMP88CS38BNG | |
| Descripción | (TMP88Cx38xxG) CMOS 8-Bit Microcontroller | |
| Fabricantes | Toshiba | |
| Logotipo |  |
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TMP88CS38B/CM38B/CP38B
CMOS 8-Bit Microcontroller
TMP88CS38BNG/FG, TMP88CM38BNG/FG, TMP88CP38BNG/FG
The TMP88CS38B/CM38B/CP38B is the high speed and high performance 8-bit single chip
microcomputers. This MCU contain CPU core, ROM, RAM, input/output ports, four Multi-function
timer/counters, serial bus interface, on-screen display, PWM output, 8-bit AD converter, and
remote control signal preprocessor on chip.
Product No.
TMP88CS38BNG/FG
TMP88CM38BNG/FG
TMP88CP38BNG/FG
ROM
64 K × 8 bits
32 K × 8 bits
48 K × 8 bits
RAM
2 K × 8 bits
1.5 K × 8 bits
Package
OTP MCU
SDIP42-P-600-1.78
TMP88PS38BNG/FG
P-QFP44-1414-0.80K
Features
♦ 8-bit single chip microcomputer TLCS-870/X series
♦ Instruction execution time: 0.25 µs (at 16 MHz)
♦ 842 basic instructions
• Multiplication and division (8 bits × 8 bits, 16 bits × 8 bits, 16 bits/8 bits)
• Bit manipulations (Set/clear/complement/move/test/exclusive or)
• 16-bit data and 20-bit data operations
• 1-byte jump/subroutine call (Short relative jump/vector call)
♦ I/O ports: Maximum 33 (High current output: 4)
♦ 17 interrupt sources: External 6, internal 11
• All sources have independent latches each, and nested interrupt control is available.
• Edge-selectable external interrupts with noise reject
• High-speed task switching by register bank changeover
♦ ROM corrective function
♦ Two 16-bit timer/counters: TC1, TC2
• Timer, event counter, pulse width measurement, external trigger timer, window modes
030619EBP1
• The information contained herein is subject to change without notice.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of TOSHIBA or others.
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for
Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunctionor
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made
at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law
and regulations.
• For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality
and Reliability Assurance/Handling Precautions.
Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use
these components in an I2C system, provided that the system conforms to the I2C Standard
Specification as defined by Philips.
88CS38B-1
2004-8-18
1 page  
Pin Functions (2/2)
Pin Name
I/O
P71 ( VD )
I/O (Input)
P70 ( HD )
XIN, XOUT
RESET
TEST
OSC1, OSC2
VDD, VSS, VVSS
I/O (Input)
Input, Output
I/O
Input
Input, Output
Power supply
TMP88CS38B/CM38B/CP38B
Function
2-bit programmable input/output port.
Each bit of these ports can be
individually configured as an input or
an output under software control.
During reset, all bits are configured as
inputs.
Vertical synchronous signal input
Horizontal synchronous signal input
Resonator connecting pins. For inputting external clock, XIN is used and XOUT
is opened.
Reset signal input or watchdog timer output/address-trap-reset
output/system-clock-reset output
Test pin for out-going test. Be tied to low.
Resonator connecting pins for on-screen display circuitry
+5 V, 0 V (GND)
88CS38B-5
2004-8-18
5 Page 
TMP88CS38B/CM38B/CP38B
(2) Machine cycle
Instruction execution and peripheral hardware operation are synchronized with the
main system clock. The minimum instruction execution unit is called a “machine cycle”.
There are a total of 15 different types of instructions for the TLCS-870/X series:
Ranging from 1-cycle instructions which require one machine cycle for execution to
15-cycle instructions which require 15 machine cycles for execution.
A machine cycle consists of 4 states (S0 to S3), and each state consists of one main
system clock.
1/fc
Main System clock
fm
State
S0
S1 S2 S3
S0
S1
S2
S3
Machine cycle
(0.25 µs at fc = 16 MHz)
Figure 1.4.6 Machine Cycle
1.4.3
Standby Controller
The standby controller starts and stops the switches the main system clock. These modes
are controlled by the system control registers (SYSCR1, SYSCR2).
Figure 1.4.7 shows the operating mode transition diagram and Figure 1.4.8 shows the
system control registers.
(1) Single-clock mode
In the single-clock mode, the machine cycle time is 4/fc [s] (0.25 µs at fc = 16 MHz).
1. NORMAL mode
In this mode, both the CPU core and on-chip peripherals operate using the
high-frequency clock.
2. IDLE mode
In this mode, the internal oscillation circuit remains active. The CPU and the
watchdog timer are halted; however, on-chip peripherals remain active (Operate
using the high-frequency clock). IDLE mode is started by setting IDLE bit in the
system control register 2 (SYSCR2), and IDLE1 mode is released to NORMAL
mode by an interrupt request from on-chip peripherals or external interrupt
inputs. When IMF (Interrupt master enable flag) is “1” (Interrupt enable), the
execution will resume upon acceptance of the interrupt, and the operation will
return to normal after the interrupt service is completed. When IMF is “0”
(Interrupt disable), the execution will resume with the instruction which follows
IDLE mode start instruction.
3. STOP mode
In this mode, the internal oscillation circuit is turned off, causing all system
operations to be halted. The internal status immediately prior to the halt is held
with the lowest power consumption during this mode.
STOP mode is started by setting STOP bit in the system control register 1
(SYSCR1), and STOP mode is released by an input (Either level-sensitive or
edge-sensitive can be programmably selected) to the STOP pin. After the warm-up
period is completed, the execution resumes with the next instruction which
follows the STOP mode start instruction.
88CS38B-11
2004-8-18
11 Page | ||
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