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UT6264BのメーカーはUtronです、この部品の機能は「8K X 8 BIT LOW POWER CMOS SRAM」です。 |
部品番号 | UT6264B |
| |
部品説明 | 8K X 8 BIT LOW POWER CMOS SRAM | ||
メーカ | Utron | ||
ロゴ | |||
このページの下部にプレビューとUT6264Bダウンロード(pdfファイル)リンクがあります。 Total 10 pages
UTRON
UT6264B
Rev 1.0
8K X 8 BIT LOW POWER CMOS SRAM
____________________________________________________________________________________________
FEATURES
The UT6264B is a 65,536-bit low power
Access time : 35/70ns (max.)
Low power consumption:
Operating : 60/40 mA (typical)
Standby :0.3 mA (typical) normal
CMOS static random access memory
organized as 8,192 words by 8 bits. It is
fabricated using high performance, high
reliability CMOS technology.
2 µA (typical) L-version
1 µA (typical) LL-version
Single 5V power supply
All inputs and outputs TTL compatible
Fully static operation
Three state outputs
Data retention voltage : 2V (min.)
m Package : 28-pin 600 mil PDIP
o28-pin 330 mil SOP
.cFUNCTIONAL BLOCK DIAGRAM
The UT6264B is designed for high-speed
and low power application. It is particularly
well suited for battery back-up nonvolatile
memory application.
The UT6264B operates from a single 5V
power supply and all inputs and outputs are
fully TTL compatible.
PIN CONFIGURATION
UA4
A3
t4A12 .
e.A7 ROW
A6 DECODER
eA5 .
A8
hA2
MEMORY ARRAY
256 ROWS × 256 COLUMNS
taSI/O1
...
...
I/O
CONTROL
I/O8
...
. ..
COLUMN I/O
COLUMN DECODER
aCE LOGIC
.DWE CONTROL
OE
A10 A9 A11 A1 A0
wPIN DESCRIPTION
VCC
VSS
NC 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
I/O1 11
I/O2 12
I/O3 13
Vss 14
28 Vcc
27 WE
26 NC
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 I/O8
18 I/O7
17 I/O6
16 I/O5
15 I/O4
PDIP / SOP
wSYMBOL
A0 – A12
wI/O1 – I/O8
mCE
oWE
.cOE
UVCC
t4VSS
eNC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
taSheGENERAL DESCRIPTION
a_____________________________________________________________________________________________
.DUTRON TECHNOLOGY INC.
P80039
w1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
ww1
1 Page
UTRON
UT6264B
Rev 1.0
8K X 8 BIT LOW POWER CMOS SRAM
_____________________________________________________________________________________________
CAPACITANCE (TA=25℃, f=1.0MHz)
PARAMETER
SYMBOL
MIN.
MAX
Input Capacitance
CIN - 8
Input/Output Capacitance
CI/O - 10
Note : These parameters are guaranteed by device characterization, but not production tested.
UNIT
pF
pF
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0V to 3.0V
5ns
1.5V
CL = 100pF, IOH/IOL = -1mA/4mA
AC ELECTRICAL CHARACTERISTICS (VCC = 5V± 10% , TA = 0℃ to 70℃)
(1) READ CYCLE
PARAMETER
SYMBOL
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
UT6264B-35
MIN. MAX.
35 -
- 35
- 35
- 25
10 -
5-
- 25
- 25
5-
UT6264B-70
MIN. MAX.
70 -
- 70
- 70
- 35
10 -
5-
- 35
- 35
5-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
(2) WRITE CYCLE
PARAMETER
SYMBOL UT6264B-35 UT6264B-70
MIN. MAX. MIN. MAX.
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
tWC
tAW
tCW
tAS
tWP
tWR
tDW
tDH
tOW*
tWHZ*
35 - 70 -
30 - 60 -
30 - 60 -
0- 0 -
25 - 50 -
0- 0 -
20 - 30 -
0- 0 -
5- 5 -
- 15 -
25
*These parameters are guaranteed by device characterization, but not production tested.
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80039
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
3Pages
UTRON
UT6264B
Rev 1.0
8K X 8 BIT LOW POWER CMOS SRAM
_____________________________________________________________________________________________
DATA RETENTION CHARACTERISTICS (TA = 0℃ to 70℃)
PARAMETER
Vcc for Data Retention
Data Retention Current
Chip Disable to Data
Retention Time
Recovery Time
tRC* = Read Cycle Time
SYMBOL TEST CONDITION
VDR CE ≧ VCC-0.2V
IDR Vcc=3V
CE ≧ VCC-0.2V
tCDR See Data Retention
Waveforms (below)
tR
MIN. TYP. MAX. UNIT
2.0 - 5.5 V
-L -
- LL -
1 50 µA
0.5 20 µA
0-
- ns
tRC* -
- ns
DATA RETENTION WAVEFORM
VCC
CE
4.5V
tCDR
Date Retention Mode
VDR ≧ 2V
4.5V
tR
VSS
CE ≧ VCC -0.2V
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC.
P80039
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
6
6 Page | |||
ページ | 合計 : 10 ページ | ||
|
PDF ダウンロード | [ UT6264B データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
UT6264B | 8K X 8 BIT LOW POWER CMOS SRAM | Utron |
UT6264C | 8K X 8 BIT LOW POWER CMOS SRAM | ETC |
UT6264CPC-35 | 8K X 8 BIT LOW POWER CMOS SRAM | ETC |
UT6264CPC-35L | 8K X 8 BIT LOW POWER CMOS SRAM | ETC |