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HM51W17805のメーカーはElpida Memoryです、この部品の機能は「16M EDO DRAM」です。 |
部品番号 | HM51W17805 |
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部品説明 | 16M EDO DRAM | ||
メーカ | Elpida Memory | ||
ロゴ | |||
このページの下部にプレビューとHM51W17805ダウンロード(pdfファイル)リンクがあります。 Total 30 pages
HM51W17805 Series
16 M EDO DRAM (2-Mword × 8-bit)
2 k Refresh
E0155H10 (Ver. 1.0)
(Previous ADE-203-631D (Z))
Jun. 27, 2001
Description
The HM51W17805 is a CMOS dynamic RAM organized 2,097,152-word × 8-bit. It employs the most
advanced CMOS technology for high performance and low power. The HM51W17805 offers Extended Data
Out (EDO) Page Mode as a high speed access mode. Multiplexed address input permits the HM51W17805 to
be packaged in standard 28-pin plastic SOJ and 28-pin TSOP.
Features
• Single 3.3 V (±0.3 V)
• Access time: 50 ns/60 ns/70 ns (max)
• Power dissipation
Active mode: 396 mW/360 mW/324 mW (max)
Standby mode : 7.2 mW (max)
: 0.54 mW (max) (L-version)
• EDO page mode capability
• Long refresh period
2048 refresh cycles : 32 ms
: 128 ms (L-version)
• 4 variations of refresh
RAS-only refresh
CAS-before-RAS refresh
Hidden refresh
Self refresh (L-version)
• Battery backup operation (L-version)
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
1 Page Pin Arrangement
HM51W17805J/LJ Series
HM51W17805S/LS Series
VCC
I/O0
I/O1
I/O2
I/O3
WE
RAS
NC
A10
A0
A1
A2
A3
VCC
1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
(Top view)
VSS
I/O7
I/O6
I/O5
I/O4
CAS
OE
A9
A8
A7
A6
A5
A4
VSS
HM51W17805 Series
HM51W17805TT/LTT Series
HM51W17805TS/LTS Series
VCC
I/O0
I/O1
I/O2
I/O3
WE
RAS
NC
A10
A0
A1
A2
A3
VCC
1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
(Top view)
VSS
I/O7
I/O6
I/O5
I/O4
CAS
OE
A9
A8
A7
A6
A5
A4
VSS
Pin Description
Pin name
A0 to A10
I/O0 to I/O7
RAS
CAS
WE
OE
VCC
VSS
NC
Function
Address input
Row/Refresh address A0 to A10
Column address
A0 to A9
Data input/data output
Row address strobe
Column address strobe
Read/Write enable
Output enable
Power supply
Ground
No connection
Data Sheet E0155H10
3
3Pages HM51W17805 Series
DC Characteristics (Ta = 0 to +70°C, VCC = 3.3 V ± 0.3 V, VSS = 0 V)
-5 -6 -7
Parameter
Symbol Min Max Min Max Min Max Unit Test conditions
Operating current*1, *2
Standby current
ICC1 — 110 — 100 — 90 mA tRC = min
ICC2 — 2 — 2 — 2 mA TTL interface
RAS, CAS = VIH
Dout = High-Z
—1
—1
—1
mA CMOS interface
RAS, CAS ≥ VCC – 0.2V
Dout = High-Z
Standby current (L-version) ICC2
— 150 — 150 — 150 µA
CMOS interface
RAS, CAS ≥ VCC – 0.2V
Dout = High-Z
RAS-only refresh current*2
Standby current*1
I CC3
I CC5
— 110 — 100 — 90 mA tRC = min
—5
—5
—5
mA RAS = VIH, CAS = VIL
Dout = enable
CAS-before-RAS refresh
current
I CC6
— 110 — 100 — 90 mA tRC = min
EDO page mode current*1, *3
Battery backup current*4
(Standby with CBR refresh)
(L-version)
I CC7
I CC10
Self refresh mode current
(L-version)
I CC11
— 100 — 90 — 85 mA tHPC = min
— 400 — 400 — 400 µA
CMOS interface
Dout = High-Z
CBR refresh: tRC = 62.5 µs
tRAS ≤ 0.3 µs
— 250 — 250 — 250 µA
CMOS interface
RAS, CAS ≤ 0.2V
Dout = High-Z
Input leakage current
Output leakage current
I LI
I LO
–10 10 –10 10 –10 10 µA
–10 10 –10 10 –10 10 µA
0 V ≤ Vin ≤ 4.6 V
0 V ≤ Vout ≤ 4.6 V
Dout = disable
Output high voltage
VOH
2.4 VCC 2.4 VCC 2.4 VCC V
High Iout = –2 mA
Output low voltage
VOL 0 0.4 0 0.4 0 0.4 V Low Iout = 2 mA
Notes: 1. ICC depends on output load condition when the device is selected. ICC max is specified at the output
open condition.
2. Address can be changed once or less while RAS = VIL.
3. Address can be changed once or less while CAS = VIH.
4. CAS = L (≤ 0.2 V) while RAS = L (≤ 0.2 V).
Data Sheet E0155H10
6
6 Page | |||
ページ | 合計 : 30 ページ | ||
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PDF ダウンロード | [ HM51W17805 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
HM51W17805 | 16M EDO DRAM | Elpida Memory |
HM51W17805B | 2M x 8-Bit DRAM | Hitachi |
HM51W17805BLTT | 2M x 8-Bit DRAM | Hitachi |