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PDF D17P137ACT Data sheet ( Hoja de datos )
| Número de pieza | D17P137ACT | |
| Descripción | UPD17P137ACT | |
| Fabricantes | NEC | |
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µPD17134A SUBSERIESwww.DataSheet4U.com
4-BIT SINGLE-CHIP MICROCONTROLLER
© 1993
µPD17134A
µPD17135A
µPD17136A
µPD17137A
µPD17P136A
µPD17P137A
Document No. U11607EJ3V0UM00 (3rd edition)
Date Published December 1996 N
Printed in Japan
1 page  
www.DataSheet4U.com
Major Revisions in This Edition
Page
Throughout
p. 5
p. 18
p. 19
p. 23
p. 31
p. 35
p. 43
p. 47
p. 58
p. 59
p. 61
p. 61
p. 71
p. 111
p. 149
p. 169
p. 179
p. 190
p. 194
p. 198
p. 255
p. 257
p. 261
p. 263
p. 267
Description
Change of name µPD1713XA to µPD17134A subseries
Correction of (2) Program memory write/verify mode in 1.4 PIN CONFIGURATION
Change of Figure 3-2 Value of Program Counter after Instruction
Partial correction of 3.2.2 On Execution of Branch Instruction (BR)
Partial correction of 3.2.3 On During Execution of Subroutine Call
Change of CHAPTER 4 PROGRAM MEMORY (ROM)
Partial correction of Figure 5-1 Data Memory Configuration
Change of CHAPTER 6 STACK
Partial correction of 7.2.2 Address Register Functions
Change of 7.5 INDEX REGISTER (IX) AND DATA MEMORY ROW ADDRESS
POINTER (MEMORY POINTER: MP)
Partial change of 7.6.2 Functions of General Register Pointer
Partial change of 7.7.1 Program Status Word Configuration
Change of 7.7.4 Zero Flag (Z) and Compare Flag (CMP)
Partial correction of 7.7.5 Carry Flag (CY)
Partial correction of 9.2.3 Register File Manipulation Instructions
Change of CHAPTER 13 PERIPHERAL HARDWARE
Change of CHAPTER 14 INTERRUPT FUNCTIONS
Change of CHAPTER 16 STANDBY FUNCTION
Change of CHAPTER 17 RESET
Partial change of Table 18-2 Differences between Mask ROM Version and One-
Time PROM Version
Partial change of 19.3 LIST OF THE INSTRUCTION SET
Partial change of 19.5 INSTRUCTIONS
Change of CHAPTER 20 ASSEMBLER RESERVED WORDS
Partial change of 20.2 RESERVED SYMBOLS
Addition of APPENDIX A DEVELOPMENT OF µPD171×× SUBSERIES
Addition of APPENDIX B COMPARISON OF FUNCTIONS BETWEEN µPD17135A,
17137A, AND µPD17145 SUBSERIES
Addition of APPENDIX D NOTES ON CONFIGURATION OF SYSTEM CLOCK
OSCILLATION CIRCUIT
The mark shows major revisions made in this edition.
5 Page 
11.6 COMPARISON JUDGEMENTS .............................................................................................................. 96
11.6.1 “Equal to” Judgement ................................................................................................................ 96
11.6.2 “Not Equal to” Judgement ......................................................................................................... 97
11.6.3 “Greater Than or Equal to” Judgement .................................................................................... 97
11.6.4 “Less Than” Judgement ............................................................................................................ 98
11.7 ROTATIONS ............................................................................................................................................. 99
11.7.1 Rotation to the Right ................................................................................................................. 99
11.7.2 Rotation to the Left .................................................................................................................. 100
CHAPTER 12 PORTS ......................................................................................................................... 101
12.1 PORT 0A (P0A0, P0A1, P0A2, P0A3) .................................................................................................... 101
www.DataSheet4U.com12.2 PORT 0B (P0B0, P0B1, P0B2, P0B3) .................................................................................................... 102
12.3 PORT 0C (P0C0/ADC0, P0C1/ADC1, P0C2/ADC2, P0C3/ADC3) .......................................................... 103
12.4 PORT 0D (P0D0/SCK, P0D1/SO, P0D2/SI, P0D3/TM0OUT) ................................................................ 104
12.5 PORT 1A (P1A0, P1A1, P1A2, P1A3) .................................................................................................... 105
12.6 PORT 1B (P1B0) .................................................................................................................................... 105
12.7 PORT CONTROL REGISTER ............................................................................................................... 106
12.7.1 Input/Output Switching by Group I/O ...................................................................................... 106
12.7.2 Input/Output Switching by Bit I/O ........................................................................................... 107
12.7.3 Specifying Pull-Up Resistor Incorporation Using Software ................................................... 109
CHAPTER 13 PERIPHERAL HARDWARE ......................................................................................... 111
13.1 8-BIT TIMERS/COUNTERS (TM0 and TM1) ........................................................................................ 111
13.1.1 8-Bit Timers/Counters Configuration ....................................................................................... 111
13.1.2 Operation of 8-Bit Timers/Counters ........................................................................................ 115
13.1.3 Selecting Count Pulse ............................................................................................................. 115
13.1.4 Setting Count Value to Modulo Register ................................................................................ 116
13.1.5 Reading Value of Count Register ........................................................................................... 117
13.1.6 Setting of Interval Time ........................................................................................................... 118
13.1.7 Error of Interval Time ............................................................................................................... 119
13.1.8 Timer 0 Output ......................................................................................................................... 121
13.2 BASIC INTERVAL TIMER (BTM) ......................................................................................................... 122
13.2.1 Basic Interval Timer Configuration .......................................................................................... 122
13.2.2 Registers Controlling Basic Interval Timer ............................................................................. 123
13.2.3 Operation of Basic Interval Timer ........................................................................................... 124
13.2.4 Watchdog Timer Function ....................................................................................................... 125
13.3 A/D CONVERTER ................................................................................................................................. 128
13.3.1 A/D Converter Configuration ................................................................................................... 128
13.3.2 Functions of A/D Converter ..................................................................................................... 129
13.3.3 Setting Values in the 8-bit Data Register (ADCR) ................................................................. 132
13.3.4 Reading Values from the 8-bit Data Register (ADCR) .......................................................... 133
13.3.5 A/D Converter Operation ......................................................................................................... 134
13.4 SERIAL INTERFACE (SIO) .................................................................................................................. 141
13.4.1 Functions of the Serial Interface ............................................................................................. 141
13.4.2 3-wire Serial Interface Operation Modes ................................................................................ 143
13.4.3 Setting Values in the Shift Register ........................................................................................ 147
13.4.4 Reading Values from the Shift Register ................................................................................. 148
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