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FT245BMのメーカーはFuture Technology Devicesです、この部品の機能は「USB FIFO IC」です。 |
部品番号 | FT245BM |
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部品説明 | USB FIFO IC | ||
メーカ | Future Technology Devices | ||
ロゴ | |||
このページの下部にプレビューとFT245BMダウンロード(pdfファイル)リンクがあります。 Total 24 pages
.com FT245BM USB FIFO ( USB - Parallel ) I.C.
Sheet4UThe FT245BM is the 2nd generation of FTDI’s popular USB FIFO I.C. This device not only adds extra functionality
tato its FT8U245AM predecessor and reduces external component count, but also maintains a high degree of pin
acompatibility with the original, making it easy to upgrade or cost reduce existing designs as well as increasing the
.Dpotential for using the device in new application areas.
www1.0 Features
HARDWARE FEATURES
• Single Chip USB Parallel FIFO bi-directional
mData Transfer
o• Transfer Data rate to 1M Byte / Sec - D2XX Drivers
.c• Transfer Data rate to 300 Kilobyte / Sec - VCP
Drivers
U• Simple to interface to MCU / PLD/ FPGA logic with
a 4 wire handshake interface
t4• Entire USB protocol handled on-chip… no USB-
especific firmware programming required
• FTDI’s royalty-free VCP and D2XX drivers
eeliminate the requirement for USB driver
hdevelopment in most cases.
S• 384 Byte FIFO Tx buffer / 128 Byte FIFO Rx Buffer
for high data throughput.
ta• New Send Immediate support via SI Pin for
aoptimised data throughput.
• Support for USB Suspend / Resume through
.DPWREN# and WAKEUP pins.
• Support for high power USB Bus powered devices
wthrough PWREN# pin
• Adjustable RX buffer timeout
w• In-built support for event characters
w• Integrated level converter on FIFO and control
• 4.35V to 5.25V single supply operation
• UHCI / OHCI / EHCI host controller compatible
• USB 1.1 and USB 2.0 compatible
• USB VID, PID , Serial Number and Product
Description strings in external EEPROM
• EEPROM programmable on-board via USB
• Compact 32LD LQFP package
VIRTUAL COM PORT (VCP) DRIVERS for
- Windows 98 and Windows 98 SE
- Windows 2000 / ME / XP
- Windows CE 4.2
- MAC OS-8 and OS-9
- MAC OS-X
- Linux 2.40 and greater
D2XX (USB Direct Drivers + DLL S/W Interface)
- Windows 98 and Windows 98 SE
- Windows 2000 / ME / XP
- Windows CE 4.2
- Linux 2.4 and Greater
APPLICATION AREAS
- Easy MCU / PLD / FPGA interface to USB
- Upgrading Legacy Peripheral Designs to USB
- USB Instrumentation
- USB Industrial Control
signals for interfacing to 5V and 3.3V logic
- USB Audio and Low Bandwidth Video data transfer
om• Integrated 3.3V regulator for USB IO
- PDA USB data transfer
.c• Integrated Power-On-Reset circuit
- USB MP3 Player Interface
U• Integrated 6MHz – 48Mhz clock multiplier PLL
- USB FLASH Card Reader / Writers
et4• USB Bulk or Isochronous data transfer modes
- Set Top Box (S.T.B.) PC - USB interface
e• New Bit-Bang Mode allows the data bus to be used - USB Digital Camera Interface
Shas an 8 bit general purpose IO Port without the
- USB Hardware Modems
taneed for MCU or other support logic.
- USB Wireless Modems
www.DaDS245B Version 1.6 © Future Technology Devices Intl. Ltd. 2005
Page 1 of 24
1 Page FT245BM USB FIFO ( USB - Parallel ) I.C.
A new PWREN# signal is provided which can be
such as transferring audio and low bandwidth
used to directly drive a transistor or P-Channel
video data, the new device now offers an option of
MOSFET in applications where power switching
USB Isochronous transfer via an option bit in the
of external circuitry is required. A new EEPROM
EEPROM.
based option makes the device pull gently down
• Programmable FIFO TX Buffer Timeout
its FIFO interface lines when the power is shut
In the previous device, the TX buffer timeout
off (PWREN# is High). In this mode, any residual
used to flush remaining data from the TX buffer
voltage on external circuitry is bled to GND when
was fixed at 16ms timeout. This timeout is now
power is removed thus ensuring that external
programmable over USB in 1ms increments
circuitry controlled by PWREN# resets reliably
from 1ms to 255ms, thus allowing the device to
when power is restored. PWREN# can also be
be better optimised for protocols requiring faster
used by external circuitry to determine when USB
response times from short data packets.
is in suspend mode (PWREN# goes high).
• Relaxed VCC Decoupling
• Send Immediate / WakeUp (SI / WU) signal
The 2nd generation devices now incorporate a level
The new Send Immediate / WakeUp signal
of on-chip VCC decoupling. Though this does
combines two functions on a single pin. If USB is
not eliminate the need for external decoupling
in suspend mode (and remote wakeup is enabled
capacitors, it significantly improves the ease of
in the EEPROM), strobing this pin low will cause
PCB design requirements to meet FCC, CE and
the device to request a resume from suspend
other EMI related specifications.
(WakeUp) on the USB Bus. Normally, this can
be used to wake up the Host PC. During normal
• Bit Bang Mode
operation, if this pin is strobed low any data in the
The 2nd generation device has a new option
device RX buffer will be sent out over USB on the
referred to as “Bit Bang” mode. In Bit Bang mode,
next Bulk-IN request from the drivers regardless of
the eight FIFO data lines can be switched between
the packet size. This can be used to optimise USB
FIFO interface mode and an 8-bit Parallel IO
transfer speed for some applications.
port. Data packets can be sent to the device and
they will be sequentially sent to the interface at
• Lower Suspend Current
a rate controlled by an internal timer (equivalent
Integration of RCCLK within the device and internal
to the prescaler of the FT232BM device). As well
design improvements reduce the suspend current
as allowing the device to be used stand-alone
of the FT245BM to under 100uA typical (excluding
as a general purpose IO controller for example
the 1.5K pull-up on USBDP) in USB suspend
controlling lights, relays and switches, some other
mode. This allows greater margin for peripherals to
interesting possibilities exist. For instance, it may
meet the USB Suspend current limit of 500uA.
be possible to connect the device to an SRAM
configurable FPGA as supplied by vendors such as
• Support for USB Isochronous Transfers
Altera and Xilinx. The FPGA device would normally
Whilst USB Bulk transfer is usually the best
be un-configured (i.e. have no defined function) at
choice for data transfer, the scheduling time of the
power-up. Application software on the PC could
data is not guaranteed. For applications where
use Bit Bang Mode to download configuration
scheduling latency takes priority over data integrity
data to the FPGA which would define its hardware
DS245B Version 1.6 © Future Technology Devices Intl. Ltd. 2005
Page 3 of 24
3Pages • Serial Interface Engine (SIE)
The Serial Interface Engine (SIE) block performs
the Parallel to Serial and Serial to Parallel
conversion of the USB data. In accordance to the
USB 2.0 specification, it performs bit stuffing / un-
stuffing and CRC5 / CRC16 generation / checking
on the USB data stream.
• USB Protocol Engine
The USB Protocol Engine manages the data
stream from the device USB control endpoint. It
handles the low level USB protocol (Chapter 9)
requests generated by the USB host controller
and the commands for controlling the functional
parameters of the FIFO.
• FIFO Receive Buffer (128 bytes)
Data sent from the USB Host to the FIFO via
the USB data out endpoint is stored in the FIFO
Receive Buffer and is removed from the buffer by
reading the FIFO contents using RD#.
• FIFO Transmit Buffer (384 bytes)
Data written into the FIFO using WR# is stored in
the FIFO Transmit Buffer. The Host removes Data
from the FIFO Transmit Data by sending a USB
request for data from the device data in endpoint.
• FIFO Controller
The FIFO Controller handles the transfer of data
between the external FIFO interface pins and the
FIFO Transmit and Receive buffers.
FT245BM USB FIFO ( USB - Parallel ) I.C.
enumeration is required. RSTOUT# will be low for
approximately 5ms after VCC has risen above 3.5V
AND the device oscillator is running AND RESET#
is high. RESET# should be tied to VCC unless it
is a requirement to reset the device from external
logic or an external reset generator I.C.
• EEPROM Interface
Though the FT245BM will work without the optional
EEPROM, an external 93C46 (93C56 or 93C66)
EEPROM can be used to customise the USB VID,
PID, Serial Number, Product Description Strings
and Power Descriptor value of the FT245BM for
OEM applications. Other parameters controlled
by the EEPROM include Remote Wake Up,
Isochronous Transfer Mode, Soft Pull Down on
Power-Off and USB 2.0 descriptor modes.
The EEPROM should be a 16 bit wide
configuration such as a MicroChip 93LC46B or
equivalent capable of a 1Mb/s clock rate at VCC =
4.35V to 5.25V. The EEPROM is programmable-
on board over USB using a utility available from
FTDI’s web site ( http://www.ftdichip.com ). This
allows a blank part to be soldered onto the PCB
and programmed as part of the manufacturing and
test process.
If no EEPROM is connected (or the EEPROM
is blank), the FT245BM will use its built-in
default VID, PID Product Description and Power
Descriptor Value. In this case, the device will not
have a serial number as part of the USB descriptor.
• RESET Generator
The Reset Generator Cell provides a reliable
power-on reset to the device internal circuitry
on power up. An additional RESET# input and
RSTOUT# output are provided to allow other
devices to reset the FT245BM, or the FT245BM
to reset other devices respectively. During reset,
RSTOUT# is driven low, otherwise it drives out
at the 3.3V provided by the onboard regulator.
RSTOUT# can be used to control the 1.5K
pull-up on USBDP directly where delayed USB
DS245B Version 1.6 © Future Technology Devices Intl. Ltd. 2005
Page 6 of 24
6 Page | |||
ページ | 合計 : 24 ページ | ||
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部品番号 | 部品説明 | メーカ |
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