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PDF MR18R1622DF0 Data sheet ( Hoja de datos )

Número de pieza MR18R1622DF0
Descripción (MR1xR1622(4/8/G)DF0) Key Timing Parameters
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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MR16R1622(4/8/G)DF0
MR18R1622(4/8/G)DF0
Change History
Version 1.0 (July 2002)
* First copy.
* Based on the 1.4 ver. (July 2002) 256/288Mbit A-die RIMMModule Datasheet
Page 0
Version 1.0 July 2002

1 page




MR18R1622DF0 pdf
MR16R1622(4/8/G)DF0
MR18R1622(4/8/G)DF0
Signal
RCOL4..
RCOL0
Pins
A73, B73, A71, B71, A69
RCTM
A79
RCTMN A81
RDQA8.. A91, B91, A89, B89, A87, B87, A85,
RDQA0 B85, A83
RDQB8.. B61, A61, B63, A63, B65, A65, B67,
RDQB0 A67, B69
RROW2..
RROW0
B77, A75, B75
RSCK
A59
SA0
SA1
SA2
SCL
SDA
B53
B55
B57
A53
A55
SIN B36
SOUT
A36
SVDD
SWP
VCMOS
Vdd
Vref
A56, B56
A57
A35, B35, A37, B37
A41, A42, A54, A58, B41, B42, B54,
B58
A51, B51
I/O Type
Description
I
RSL
Column bus. 5-bit bus containing control and address infor-
mation for column accesses.
I
RSL
Clock to master. Interface clock used for transmitting RSL
signals to the Channel. Positive polarity.
I
RSL
Clock to master. Interface clock used for transmitting RSL
signals to the Channel. Negative polarity.
Data bus A. A 9-bit bus carrying a byte of read or write data
I/O RSL between the Channel and the RDRAM device. RDQA8 is
non-functional on modules x16 RDRAM devices.
Data bus B. A 9-bit bus carrying a byte of read or write data
I/O RSL between the Channel and the RDRAM device. RDQB8 is
non-functional on modules x16 RDRAM devices.
I
RSL
Row bus. 3-bit bus containing control and address information
for row accesses.
I
VCMOS
Serial Clock input. Clock source used to read from and write
to the RDRAM control registers.
I SVDD Serial Presence Detect Address 0.
I SVDD Serial Presence Detect Address 1.
I SVDD Serial Presence Detect Address 2.
I SVDD Serial Presence Detect Clock.
I/O SVDD Serial Presence Detect Data (Open Collector I/O).
I/O
VCMOS
Serial I/O for reading from and writing to the control registers.
Attaches to SIO0 of the first RDRAM device on the module.
I/O
VCMOS
Serial I/O for reading from and writing to the control registers.
Attaches to SIO1 of the last RDRAM device on the module.
SPD Voltage. Used for signals SCL, SDA, SWE, SA0, SA1
and SA2.
I
SVDD
Serial Presence Detect Write Protect (active high). When low,
the SPD can be written as well as read.
CMOS I/O Voltage. Used for signals CMD, SCK, SIN, SOUT.
Supply voltage for the RDRAM core and interface logic.
Logic threshold reference voltage for RSL signals.
Page 4
Version 1.0 July 2002

5 Page





MR18R1622DF0 arduino
MR16R1622(4/8/G)DF0
MR18R1622(4/8/G)DF0
Physical Dimensions -1 ( For PCB )
The following defines the RIMM module dimensions. All units are in millimeters with inches in brackets[ ], where appropriate.
The dimensions without tolerance specification use the default tolerance of ±0.127[±0.005].
6.35[0.25]
DIA 2.44
R 2.00
+
133.35±0.127[5.250±0.005]
120.65[4.75]
COMPONENT AREA
(A SIDE)
3.00[0.118]
4.00±0.15
[0.157±0.006]
+
7.468[0.294]
A-1
5.68[0.2236]
DETAIL A
1.00[0.039]
45.00[1.772]
4.50[0.177]
55.175±0.08[2.172±0.003]
DETAIL B
11.50[0.453]
B-1
A-92
45.00[1.772]
R 1.00
78.175[3.078]
B-92
8.60[0.339]
Min.6.35[0.25]
COMPONENT AREA
(B SIDE)
Note : The gray area above represents the contact surface of the heat spreader.
0.80±0.10
[0.031±0.004]
Heat spreader
0.15±0.10
[0.006±0.004]
1.00[0.039]
Min.4.88
[0.192]
2.99±0.05
[0.12±0.002]
DETAIL A
3.00±0.10
[0.12±0.004]
2.00±0.10
[0.079±0.004]
DETAIL B
Figure 3: 256Mb/288Mb base RIMM Module PCB Physical Dimensions
Page 10
Version 1.0 July 2002

11 Page







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