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IZ4442 の電気的特性と機能

IZ4442のメーカーはIK Semiconductorです、この部品の機能は「Intelligent 256 byte EEPROM with wirte protect function & security logic」です。


製品の詳細 ( Datasheet PDF )

部品番号 IZ4442
部品説明 Intelligent 256 byte EEPROM with wirte protect function & security logic
メーカ IK Semiconductor
ロゴ IK Semiconductor ロゴ 




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IZ4442 Datasheet, IZ4442 PDF,ピン配置, 機能
m TECHNICAL DATA
U.coINTELLIGENT 256-BYTE EEPROM WITH WRITE PROTECT
et4FUNCTION AND PROGRAMMABLE SECURITY CODE (PSC)
SheFeatures
ta256 x 8-bit EEPROM organization
aByte-wise addressing
.DIrreversible byte-wise write protection of lowest
w32 addresses (Byte 0...31)
w32 x 1-bit organization of protection memory
w Two-wire link protocol
End of processing indicated at data output
Answer-to-Reset ace. to ISO standard 7816-3
mProgramming time 2.5 ms per byte for both erasing
and writing
oMinimum of 104 write/erase cycles1)
Data retention for minimum of ten years1)
.cContact configuration and serial interface in accordance
with ISO standard 7816 (synchronous transmission)
UAdditional Feature of IZE4442
t4Data can only be changed after entry of the correct 3-byte programmable security code (security
memory)
eType
Ordering Code
Package
eIZE4442 M2.2
on request
Wire-Bonded Module M2.2
IZE4442 C
on request
Chip
hIZE4442 M2.2
on request
Wire-Bonded Module M2.2
IZE4442 C
on request
Chip
S1) Values are temperature dependent, for further information please refer to your sales office.
taPin Configuration(top view)
a(Card Contacts)Pin Definitions and Functions
.DCard Contact
C1
C2
wC3
C4
wC5
wC6
Symbol
VCC
RST
CLK
N.C.
GND
N.C.
Function
Supply voltage
Reset
Clock input
Not connected
Ground
Not connected
C7 I/O Bi-directional data line
(open drain)
omC8
N.C.
Not connected
.cIZE4442 comes as a M2.2 wire-bonded module for embedding in plastic cards or as a die for
www.DataSheet4Ucustomer packaging.
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IZ4442 pdf, ピン配列
Functional Description Block Diagram
Memory Overview
IZ4442
Figure 1 Memory Overview
The IZE4442 consists of 256 x 8 bit EEPROM main memory and a 32-bit protection memory with
PROM functionality. The main memory is erased and written byte by byte. When erased, all 8 bits of a
data byte are set to logical one. When written, the information in the individual EEPROM cells is,
according to the input data, altered bit by bit to logical zeros, (logical AND between the old and the
new data in the EEPROM). Normally a data change consists of an erase and write procedure. It
depends on the contents of the data byte in the main memory and the new data byte whether the
EEPROM is really erased and/or written. If none of the 8 bits in the addressed byte requires a zero-to-
one transition the erase access will be suppressed. Vice versa the write access will be suppressed if
no one-to-zero transition is necessary. The write and the erase operation takes at least 2.5 ms each.
Each of the first 32 bytes can be irreversibly protected against data change by writing the
corresponding bit in the protection memory. Each data byte in this address range is assigned to one
bit of the protection memory and has the same address as the data byte in the main memory which it
is assigned to. Once written the protection bit cannot be erased (PRQM).
Additionally to the above functions the IZE4442 provides a security code logic which controls the
write/erase access to the memory. For this purpose the IZE4442 contains a 4-byte security memory
with an Error Counter EC (bit 0 to bit 2) and 3 bytes reference data. These 3 bytes as a whole are
called Programmable Security Code (PSC). After power on the whole memory, except for the
reference data, can only be read. Only after a successful comparison of verification data with the
internal reference data the memory has the identical access functionality of the IZE4442 until the
power is switched off. After three successive unsuccessful comparisons the Error Counter blocks any
subsequent attempt, and hence any possibility to write and erase.
2.2 Transmission Protocol
The transmission protocol is a two wire link protocol between the interface device IFD and the
integrated circuit IC. It is identical to the protocol type "S = A". All data changes on I/O are initiated by
the falling edge on CLK.
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IZ4442 電子部品, 半導体
Beginning with the control byte LSB is transmitted first.
IZ4442
Figure 4 Command Mode
The IZE4442 provides 7 commands which are listed in table 1 and 2
Table 1
Byte 1
Byte 2
Byte 3
Operation
Control
Address
B7 B6 B5 B4 B3 B2 B1 B0 A7 - A0
Data
D7 – D0
0 01 1 0 0 0 0
0 01 1 1 0 0 0
0 01 1 0 1 0 0
0 01 1 1 1 0 0
address
address
no effect
address
no effect
input data
no effect
input data
READ MAIN
MEMORY
UPDATE MAIN
MEMORY
READ PROTECTION
MEMORY
WRITE
PROTECTION
MEMORY
Table 2
00110001
no effect
no effect
READ SECURITY
MEMORY
00111001
address
input data UPDATE SECURITY
MEMORY
00110011
address
input data
COMPARE
VERIFICATION DATA
Mode
outgoing
data
processing
outgoing
data
processing
outgoing data
processing
processing
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部品番号部品説明メーカ
IZ4442

Intelligent 256 byte EEPROM with wirte protect function & security logic

IK Semiconductor
IK Semiconductor


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