IS1002 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 IS1002
部品説明 Bluetooth Baseband Controller
メーカ ETC
ロゴ ETC ロゴ 

Total 13 pages

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IS1002 Datasheet, IS1002 PDF,ピン配置, 機能
eet4U.comIntegrated System Solution Corp.
Bluetooth Baseband Controller
taSh1. General Description
.DaThe ISSC IS1002 is a highly integrated Bluetooth baseband controller providing capability
for high data rate, short-range wireless communications in the 2.4 GHz ISM band. It is
w fully compliant with version 1.1 of Bluetooth specification and some important BT1.2
w features. Specially engineered for low power consumption and cost effective solution, the
w ISSC IS1002 integrates a baseband controller, HCI controller, and Audio controller. It also
integrates a Turbo 8051 processor with 160K mask ROM for program memory and 32K
SRAM for data memory.
mThe ISSC IS1002 is also available with a Bluetooth compliant protocol stack, including
ohardware drivers, link manager (LM), and host controller interface (HCI).
.c2. Features
UCompliant with Bluetooth Specification 1.1/1.2
t4Full Bluetooth RF Interface & Lower Link Controller functions
BlueRF Interfaces to leading Radio ICs
eFull-featured hardware link controller with low-power mode and efficient data
movement architecture
eHardware support for all Bluetooth 1.1 packet types including
ho Data packets: DM1, DM3, DM5; DH1, DH3, DH5; AUX, DV
o Voice packets: HV1, HV2, HV3, DV
So Link Control packets: ID, IQ, NULL, POLL, and FHS
Flexible and robust voice CODEC algorithms (CVSD, A-law, µ-law), with 3
tasimultaneous SCO channels support.
Baseband functions implemented in hardware such as Forward Error Correction
a(FEC), whitening, Header Error Check (HEC), Shorten Hamming Code, CRC
generation/checking, and Encryption/De-encryption.
.DHardware permutation to speed up software Authentication.
Point-to-multipoint support (Piconet).
Scatternet support.
wBT1.2 Adaptive Frequency Hopping (AFH) supported.
BT1.2 Fast Connection supported.
wUltra-low low cost and power consumption features.
wIntegrated Turbo 8051 processor.
Integrated 32K bytes SRAM for common data buffer.
mIntegrated 160K bytes Mask ROM for 8051 program memory.
oHCI universal connect interface provides access to other physical host interfaces
.c(i.e. USB, UART.).
UFull-speed UART host interface.
t4Selectable reference clock frequencies.
eProtocol Stack available, including drivers, link manager, and HCI.
he48 QFN package
www.DataSPreliminary Datasheet
page 1
Released date: July 2004
Revision 0.9

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