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HM5165165FのメーカーはHitachi Semiconductorです、この部品の機能は「(HM5164165F / HM5165165F) 64M EDO DRAM (4-Mword x 16-bit) 8k refresh/4k refresh」です。 |
部品番号 | HM5165165F |
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部品説明 | (HM5164165F / HM5165165F) 64M EDO DRAM (4-Mword x 16-bit) 8k refresh/4k refresh | ||
メーカ | Hitachi Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとHM5165165Fダウンロード(pdfファイル)リンクがあります。 Total 30 pages
HM5164165F Series
HM5165165F Series
64M EDO DRAM (4-Mword × 16-bit)
8k refresh/4k refresh
ADE-203-1058B(Z)
Rev. 2.0
Nov. 30, 1999
Description
The Hitachi HM5164165F Series, HM5165165F Series are 64M-bit dynamic RAMs organized as 4,194,304-
word × 16-bit. They have realized high performance and low power by employing CMOS process technology.
HM5164165F Series, HM5165165F Series offer Extended Data Out (EDO) Page Mode as a high speed
access mode. They have the package variations of standard 50-pin plastic SOJ and standerd 50-pin plastic
TSOPII
Features
• Single 3.3 V supply: 3.3 V ± 0.3 V
• Access time: 50 ns/60 ns (max)
• Power dissipation
Active: 432 mW/396 mW (max) (HM5164165F Series)
: 504 mW/432 mW (max) (HM5165165F Series)
Standby : 1.8 mW (max) (CMOS interface)
: 1.1 mW (max) (L-version)
• EDO page mode capability
• Refresh cycles
RAS-only refresh
8192 cycles /64 ms (HM5164165F, HM5164165FL)
4096 cycles /64 ms (HM5165165F, HM5165165FL)
CBR/Hidden refresh
4096 cycles /64 ms (HM5164165F, HM5164165FL, HM5165165F, HM5165165FL)
1 Page HM5164165F Series, HM5165165F Series
Pin Arrangement (HM5164165F Series)
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
VCC
WE
RAS
NC
NC
NC
NC
A0
A1
A2
A3
A4
A5
VCC
50-pin SOJ
1 50
2 49
3 48
4 47
5 46
6 45
7 44
8 43
9 42
10 41
11 40
12 39
13 38
14 37
15 36
16 35
17 34
18 33
19 32
20 31
21 30
22 29
23 28
24 27
25 26
(Top view)
VSS
I/O15
I/O14
I/O13
I/O12
VSS
I/O11
I/O10
I/O9
I/O8
NC
VSS
LCAS
UCAS
OE
NC
NC
A12
A11
A10
A9
A8
A7
A6
VSS
Pin Description
Pin name
A0 to A12
I/O0 to I/O15
RAS
UCAS, LCAS
WE
OE
VCC
VSS
NC
Function
Address input
— Row/Refresh address A0 to A12
— Column address
A0 to A8
Data input/output
Row address strobe
Column address strobe
Write enable
Output enable
Power supply
Ground
No connection
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
VCC
WE
RAS
NC
NC
NC
NC
A0
A1
A2
A3
A4
A5
VCC
50-pin TSOP
1 50
2 49
3 48
4 47
5 46
6 45
7 44
8 43
9 42
10 41
11 40
12 39
13 38
14 37
15 36
16 35
17 34
18 33
19 32
20 31
21 30
22 29
23 28
24 27
25 26
(Top view)
VSS
I/O15
I/O14
I/O13
I/O12
VSS
I/O11
I/O10
I/O9
I/O8
NC
VSS
LCAS
UCAS
OE
NC
NC
A12
A11
A10
A9
A8
A7
A6
VSS
3
3Pages HM5164165F Series, HM5165165F Series
Block Diagram (HM5165165F Series)
RAS UCAS LCAS WE OE
Timing and control
A0
A1 Column
• address
to • buffers
•
A9
•
•
• Row
address
buffers
A10
A11
Column decoder
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
4M array
I/O buffers
I/O0
to
I/O15
6
6 Page | |||
ページ | 合計 : 30 ページ | ||
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PDF ダウンロード | [ HM5165165F データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
HM5165165F | (HM5164165F / HM5165165F) 64M EDO DRAM (4-Mword x 16-bit) 8k refresh/4k refresh | Hitachi Semiconductor |