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PDF C8051F330 Data sheet ( Hoja de datos )

Número de pieza C8051F330
Descripción (C8051F330 - C8051F335) Mixed Signal ISP Flash MCU
Fabricantes Silicon Laboratories　
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Analog Peripherals
- 10-Bit ADC (‘F330/2/4 only)
• Up to 200 ksps
• Up to 16 external single-ended or differential inputs
• VREF from internal VREF, external pin or VDD
• Internal or external start of conversion source
• Built-in temperature sensor
- 10-Bit Current Output DAC (‘F330 only)
- Comparator
• Programmable hysteresis and response time
• Configurable as interrupt or reset source
• Low current (0.4 µA)
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-
intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- Low cost, complete development kit
Supply Voltage 2.7 to 3.6 V
- Typical operating current: 6.4 mA at 25 MHz;
9 µA at 32 kHz
- Typical stop mode current: 0.1 µA
Temperature Range: –40 to +85 °C
C8051F330/1/2/3/4/5
Mixed-Signal ISP Flash MCU
High Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Expanded interrupt handler
Memory
- 768 bytes internal data RAM (256 + 512)
- 8 kB (‘F330/1), 4 kB (‘F332/3), or 2 kB (‘F334/5)
Flash; In-system programmable in 512-byte Sec-
tors—512 bytes are reserved in the 8 kB devices
Digital Peripherals
- 17 Port I/O; All 5 V tolerant with high sink current
- Hardware enhanced UART, SMBus™, and
enhanced SPI™ serial ports
- Four general purpose 16-bit counter/timers
- 16-Bit programmable counter array (PCA) with three
capture/compare modules
- Real time clock mode using PCA or timer and exter-
nal clock source
Clock Sources
- Two internal oscillators:
• 24.5 MHz with ±2% accuracy supports crystal-less
UART operation
• 80/40/20/10 kHz low frequency, low power
- External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
- Can switch between clock sources on-the-fly; useful
in power saving modes
20-Pin QFN Package
ANALOG
PERIPHERALS
A
10-bit
10-bit
M
U
200 ksps
Current
DAC
X
ADC
‘F330 only
TEMP
SENSOR
‘F330/2/4 only
+
-
VOLTAGE
COMPARATOR
DIGITAL I/O
UART
SMBus
Port 0
SPI
PCA
Port 1
Timer 0
Timer 1
P2.0
Timer 2
Timer 3
24.5 MHz PRECISION
INTERNAL OSCILLATOR
LOW FREQUENCY INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
2/4/8 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
768 B SRAM
POR WDT
Rev. 1.7 12/10
Copyright © 2010 by Silicon Laboratories
C8051F330/1/2/3/4/5

1 page




C8051F330 pdf
C8051F330/1/2/3/4/5
14.3.General Purpose Port I/O ............................................................................... 129
15. SMBus ................................................................................................................... 135
15.1.Supporting Documents ................................................................................... 136
15.2.SMBus Configuration...................................................................................... 136
15.3.SMBus Operation ........................................................................................... 136
15.3.1.Arbitration............................................................................................... 137
15.3.2.Clock Low Extension.............................................................................. 138
15.3.3.SCL Low Timeout................................................................................... 138
15.3.4.SCL High (SMBus Free) Timeout .......................................................... 138
15.4.Using the SMBus............................................................................................ 138
15.4.1.SMBus Configuration Register............................................................... 140
15.4.2.SMB0CN Control Register ..................................................................... 143
15.4.3.Data Register ......................................................................................... 146
15.5.SMBus Transfer Modes.................................................................................. 146
15.5.1.Master Transmitter Mode ....................................................................... 146
15.5.2.Master Receiver Mode ........................................................................... 148
15.5.3.Slave Receiver Mode ............................................................................. 149
15.5.4.Slave Transmitter Mode ......................................................................... 150
15.6.SMBus Status Decoding................................................................................. 150
16. UART0.................................................................................................................... 153
16.1.Enhanced Baud Rate Generation................................................................... 154
16.2.Operational Modes ......................................................................................... 155
16.2.1.8-Bit UART ............................................................................................. 155
16.2.2.9-Bit UART ............................................................................................. 156
16.3.Multiprocessor Communications .................................................................... 156
17. Enhanced Serial Peripheral Interface (SPI0)...................................................... 163
17.1.Signal Descriptions......................................................................................... 164
17.1.1.Master Out, Slave In (MOSI).................................................................. 164
17.1.2.Master In, Slave Out (MISO).................................................................. 164
17.1.3.Serial Clock (SCK) ................................................................................. 164
17.1.4.Slave Select (NSS) ................................................................................ 164
17.2.SPI0 Master Mode Operation ......................................................................... 165
17.3.SPI0 Slave Mode Operation ........................................................................... 167
17.4.SPI0 Interrupt Sources ................................................................................... 167
17.5.Serial Clock Timing......................................................................................... 168
17.6.SPI Special Function Registers ...................................................................... 169
18. Timers.................................................................................................................... 177
18.1.Timer 0 and Timer 1 ....................................................................................... 177
18.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 177
18.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 178
18.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 179
18.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 180
18.2.Timer 2 .......................................................................................................... 185
18.2.1.16-bit Timer with Auto-Reload................................................................ 185
Rev. 1.7
5

5 Page





C8051F330 arduino
C8051F330/1/2/3/4/5
List of Tables
1. System Overview
Table 1.1. Product Selection Guide ......................................................................... 18
2. Absolute Maximum Ratings
Table 2.1. Absolute Maximum Ratings .................................................................... 31
3. Global Electrical Characteristics
Table 3.1. Global Electrical Characteristics ............................................................. 32
Table 3.2. Index to Electrical Characteristics Tables............................................... 34
4. Pinout and Package Definitions
Table 4.1. Pin Definitions for the C8051F330/1/2/3/4/5........................................... 35
Table 4.2. QFN-20 Package Dimensions ................................................................ 38
Table 4.3. QFN-20 PCB Land Pattern Dimesions ................................................... 39
5. 10-Bit ADC (ADC0, C8051F330/2/4 only)
Table 5.1. ADC0 Electrical Characteristics.............................................................. 55
6. 10-Bit Current Mode DAC (IDA0, C8051F330 only)
Table 6.1. IDAC Electrical Characteristics............................................................... 60
7. Voltage Reference (C8051F330/2/4 only)
Table 7.1. Voltage Reference Electrical Characteristics.......................................... 63
8. Comparator0
Table 8.1. Comparator Electrical Characteristics .................................................... 70
9. CIP-51 Microcontroller
Table 9.1. CIP-51 Instruction Set Summary ............................................................ 73
Table 9.2. Special Function Register (SFR) Memory Map ...................................... 79
Table 9.3. Special Function Registers ..................................................................... 80
Table 9.4. Interrupt Summary .................................................................................. 88
10. Reset Sources
Table 10.1. Reset Electrical Characteristics .......................................................... 102
11. Flash Memory
Table 11.1. Flash Electrical Characteristics........................................................... 104
Table 11.2. Flash Security Summary..................................................................... 106
12. External RAM
13. Oscillators
Table 13.1. Internal Oscillator Electrical Characteristics ....................................... 122
14. Port Input/Output
Table 14.1. Port I/O DC Electrical Characteristics................................................. 134
15. SMBus
Table 15.1. SMBus Clock Source Selection .......................................................... 140
Table 15.2. Minimum SDA Setup and Hold Times ................................................ 141
Table 15.3. Sources for Hardware Changes to SMB0CN ..................................... 145
Table 15.4. SMBus Status Decoding..................................................................... 151
16. UART0
Table 16.1. Timer Settings for Standard Baud Rates Using the
Internal 24.5 MHz Oscillator ............................................................... 160
Rev. 1.7
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